참고문헌
- F. Gatta, D. Manstretta, P. Rossi, and F. Svelto, "A Fully Integrated 0.18-m CMOS Direct Conversion Receiver Front-End with On-Chip LO for UMTS," IEEE J. Solid-State Circuits, Vol. 39, No.1, pp. 15-23, Jan. 2004 https://doi.org/10.1109/JSSC.2003.820865
- Tzung-Ming Chen, et al, "A Low-Power Fullband 802.11a/b/g WLAN Transceiver with On-Chip PA," IEEE J. Soled-State Circuits, vol. 42, No. 2, pp. 983-991, Feb. 2007 https://doi.org/10.1109/JSSC.2007.894303
- L. Perraud et al., "A direct-conversion CMOS transceiver for the 802. 11a/b/g WLAN standard utilizing a Cartesian feedback transmitter," IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2226–2238, Dec. 2004 https://doi.org/10.1109/JSSC.2004.836332
- P. Zhang et al., "A single-chip dual-band direct-conversion IEEE 802.11a/b/g WLAN transceiver in 0.18 μm CMOS," IEEE J. Solid-State Circuits, vol. 40, no. 9, pp. 1932-1939, Sep. 2005 https://doi.org/10.1109/JSSC.2005.848182
- Steven Rose, A Sub Harmonic Mixer for WCDMA," MS Thesis, UC. Berkeley, 2002
- Richard Svitek, Daniel Johnson, and sanjay Raman, "An active SiGe sub-harmonic direct-conversion receiver front-end design for 5-6 GHz band applications," IEEE MTT-S Digest, pp. 505-508, Feb, 2002
- H. K. Ahn et al., "A fully integrated CMOS RF front- end with on-chip VCO for W-CDMA applications," IEICE trans. Electron, vol. E87-C, no. 6, Jun, 2004
- Ji-Hoon Kim and Hyung-Joun Yoo, "Low power octa-phase LC VCO for direct conversion 5GHz WLAN receiver," APMC2005, vol. 5, pp. 3404- 3407, Dec. 2005
- B. Razavi, "A study of phase noise in CMOS oscillators," IEEE J. Solid-State Circuits, vol. 31, pp. 331-343, Mar. 1996 https://doi.org/10.1109/4.494195
- C. C. Boon, M. A. Do, K. S. Yeo, J. G. Ma, and X. L. Zhang, "RF CMOS low-phase-noise LC oscillator through memory reduction tail transistor," IEEE Trans. Circuits and Systems, Part-II, Vol. 51, No. 2, pp. 85-90, Feb. 2004 https://doi.org/10.1109/TCSII.2003.821519
- E. A. M. Klumperink, S. L. J. Gierkink, A. P. van der Wel, and B. Nauta, "Reducing MOSFET 1/f noise and power consumption by switched biasing," IEEE J. Solid-State Circuits, Vol. 35, No. 7, pp. 994-1001, Jul. 2000 https://doi.org/10.1109/4.848208
- C-Y. Jeong and C. Yoo, "5GHz low-phase noise CMOS quadrature VCO," IEEE Trans. Microwave and Wireless Component Letters, Vol. 16, No. 11, pp. 609-611, Nov. 2006 https://doi.org/10.1109/LMWC.2006.884908
- T. H. Lin, W. J. Kaise, "A 900-MHz 2.5mA CMOS frequency synthesizer with an automatic SC tuning loop," IEEE J. Solid-State Circuits, vol. 36, pp. 424-431, Mar. 2001 https://doi.org/10.1109/4.910481
- B. Park, P. Allen, "A 1GHz, low-phase-noise CMOS frequency synthesizer with integrated LC VCO for wireless communications," IEEE Custom Integrated Circuits Conference, pp 567-570, May. 1998
- J. Y. Lee et al. "A 3.8-5.5GHz multi-band CMOS frequency synthesizer for WPAN/WLAN applications," IEEE Custom Integrated Circuits Conference, pp 377-380, Sep. 2006
- M. Terrovitis, M. Mack, K. Singh, M. Zargari, "A 3.2 to 4GHz, 0.25um CMOS frequency synthesizer for IEEE 802.11a/b/g WLAN," IEEE ISSCC Dig. Tech. Papers, pp. 354-355, Feb. 2004
- T. Maeda et al., "A low-power dual-band triple-mode WLAN CMOS transceiver," IEEE J. Solid State Circuits, vol. 41, no. 11, pp. 2481--2490, Nov. 2006 https://doi.org/10.1109/JSSC.2006.883323
- Pengfei Zhang et al., "A single-chip Dual-band cirect-conversion IEEE 802.11a/b/g WLAN trans-ceiver in 0.18-m CMOS," IEEE J. Solid-State Circuits, vol. 40, no. 9, pp. 1932-1939, Sep. 2005 https://doi.org/10.1109/JSSC.2005.848182