• Journal of electromagnetic engineering and science
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• v.11 no.1
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• pp.27-33
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• 2011

In this paper, we propose a high gain, current reused ultra wideband (UWB) low noise amplifier (LNA) that uses TSMC 0.18 ${\mu}m$ CMOS technology. To satisfy the wide input matching and high voltage gain requirements with low power consumption, a resistive current reused technique is utilized in the first stage. A ${\pi}$-type LC network is adopted in the second stage to achieve sufficient gain over the entire frequency band. The proposed UWB LNA has a voltage gain of 12.9~18.1 dB and a noise figure (NF) of 4.05~6.21 dB over the frequency band of interest (1~10 GHz). The total power consumption of the proposed UWB LNA is 10.1 mW from a 1.4 V supply voltage, and the chip area is $0.95{\times}0.9$ mm.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.6
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• pp.754-759
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• 2016

A transformer feedback low-noise amplifier (LNA) is implemented in a standard $0.18{\mu}m$ CMOS process, which exploits drain-to-gate transformer feedback technique for wideband input matching and operates across entire 3~5 GHz ultra-wideband (UWB). The proposed LNA achieves power gain above 9.5 dB, input return loss less than 15.0 dB, and noise figure below 4.8 dB, while consuming 8.1 mW from a 1.8-V supply. To the authors' knowledge, drain-to-gate transformer feedback for wideband input matching cascode LNA is the first adopted technique for UWB application.

• ETRI Journal
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• v.26 no.5
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• pp.486-492
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• 2004

The emergence of wide channel bandwidth wireless standards requires the use of a highly linear, wideband integrated CMOS baseband chain with moderate power consumption. In this paper, we present the design of highly linear, wideband active RC filters and a digitally programmable variable gain amplifier. To achieve a high unity gain bandwidth product with moderate power consumption, the feed-forward compensation technique is applied for the design of wideband active RC filters. Measured results from a $0.5{\mu}m$ CMOS prototype baseband chain show a cutoff frequency of 10 MHz, a variable gain range of 33 dB, an in-band IIP3 of 13 dBV, and an input referred noise of 114 ${\mu}Vrms$ while dissipating 20 mW from a 3 V supply.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.6 no.5
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• pp.401-406
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• 2005

Digital memory circuits have been developed very fast according to the progress of semiconductor technology. But it was very difficult to memorize a wideband radio frequency signals. Many years ago, an analog frequency memory loop(FML) was used for store of radio frequency signal and the digital radio frequency memory was made according to the development of wideband amplifier and high speed sampler. We present a design of wideband digital radio frequency reproduction device using ladder circuit and the simulation results with respect to the sampling speed in this paper.

• ETRI Journal
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• v.32 no.1
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• pp.151-153
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• 2010

A highly efficient linear and compactly integrated series-type Doherty power amplifier (PA) has been developed for wideband code-division multiple access handset applications. To overcome the size limit of a typical Doherty amplifier, all circuit elements, such as matching circuits and impedance transformers, are fully integrated into a single monolithic microwave integrated circuit (MMIC). The implemented PA shows a very low idle current of 25 mA and an excellent power-added efficiency of 25.1% at an output power of 19 dBm by using an extended Doherty concept. Accordingly, its average current consumption was reduced by 51% and 41% in urban and suburban environments, respectively, when compared with a class-AB PA. By adding a simple predistorter to the PA, the PA showed an adjacent channel leakage ratio better than -42 dBc over the whole output power range.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.1
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• pp.720-725
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• 2015

This paper describes the design of a wideband cascode amplifier using a feedback network and microwave small-signal transistors. The adopted cascode structure enables the miller effect to be lessened, cutoff frequency to increase, and reduction of gain in the mid-band to be mitigated. In addition, a feedback network is added to the cascode structure to improve the input matching and ripple performances over the wide operating band. The designed cascode amplifier contains a feedback network for small size and broadband amplification, whereas balanced amplifiers and distributed amplifiers have been used widely. The measurement shows $8.5dB{\pm}1.5dB$ of gain over 1000-2000MHz. The fabricated cascode amplifier has more than 8dB of gain over a 1000MHz bandwidth with a good flatness. The measured performances agree with the predicted ones even a minor shift in operating frequency is observed.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.301-306
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• 2015

An ultra-compact and wideband low noise amplifier (LNA) in a quad flat non-leaded (QFN) package is presented. The LNA monolithic microwave integrated circuit (MMIC) is implemented in a $0.25{\mu}m$ GaN IC technology on a Silicon Carbide (SiC) substrate provided by Triquint. A source degeneration inductor and a gate inductor are used to obtain the noise and input matching simultaneously. The resistive feedback and inductor peaking techniques are employed to achieve a wideband characteristic. The LNA chip is mounted in the $3{\times}3-mm^2$ QFN package and measured. The supply voltages for the first and second stages are 14 V and 7 V, respectively, and the total current is 70 mA. The highest gain is 13.5 dB around the mid-band, and -3 dB frequencies are observed at 0.7 and 12 GHz. Input and output return losses ($S_{11}$ and $S_{22}$) of less than -10 dB measure from 1 to 12 GHz; there is an absolute bandwidth of 11 GHz and a fractional bandwidth of 169%. Across the bandwidth, the noise figures (NFs) are between 3 and 5 dB, while the output-referred third-order intercept points (OIP3s) are between 26 and 28 dBm. The overall chip size with all bonding pads is $1.1{\times}0.9mm^2$. To the best of our knowledge, this LNA shows the best figure-of-merit (FoM) compared with other published GaN LNAs with the same gate length.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.3
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• pp.276-282
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• 2015

Until recently, power amplifiers using LDMOS were Class-AB and Doherty type, and showed 55 % efficiency for narrowband of 60 MHz bandwidth. However, owing to the RRH application of base stations power amplifier module, a bandwidth expansion of at least 100 MHz and high efficiency power amplifiers of at least 60 % power efficiency are required. In this study, a Class-J power amplifier was designed by optimizing an output matching circuit so that the second harmonic load will contain a pure reactance element only and have broadband characteristics by using GaN HEMT. The measurements showed that a 45 W Class-J power amplifier with a power added efficiency of 60~75 % was achieved when continuous wave signals were input at 1.6~2.3 GHz, including W-CDMA application.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.1
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• pp.166-172
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• 2001

A RF wideband receiver for INMARSAT-B satellite communications system was composed of low noise amplifier and high gain amplifier, The low noise amplifier used to the resistive decoupling circuit for input impedance matching and self-bias circuits for low noise. The high gain amplifier consists of matched amplifier type to improve receiver gain. The active bias circuit can be used to provide temperature stability without requiring the large voltage drop or relatively high-dissipated power needed with a bias stabilization resistor. The bandpass filter was used to reduce a spurious level. As a result, the characteristics of the receiver implemented here show more than 60 dB in gain and less than 1.8:1 in input and output voltage standing wave ratio(VSWR), especially the carrier to noise ratio which is input signal level -126.7 dB m at 1537.5 MHz is a 45.23 dB /Hz at a 1.02 kHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.11
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• pp.1019-1022
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• 2016

In this paper, a 2~16 GHz GaN wideband power amplifier MMIC s designed and fabricated using the nonuniform power amplifier design technique that utilizes drain shunt capacitors to simultaneously provide each transistor with the optimum load impedance and phase balance between input and output transmission lines. The power amplifier MMIC chip that is fabricated using the $0.25{\mu}m$ GaN HEMT foundry process of Win Semiconductors occupies an area of $3.9mm{\times}3.1mm$ and shows a linear gain of larger than 12 dB and an input return loss of greater than 10 dB. Under a continuous-wave mode, it has a saturated output power of 36.2~38.5 dBm and a power-added efficiency of about 8~16 % in 2 to 16 GHz.