• Journal of Power Electronics
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• 제19권1호
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• pp.201-210
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• 2019

This paper proposes a multimode hybrid control strategy that can achieve zero-voltage switching of primary switches and zero-current switching of secondary rectifier diodes in a wide input voltage range for full-bridge LLC resonant converters. When the input voltage is lower than the rated voltage, the converter operates in Mode 1 through the variable-frequency control strategy. When the input voltage is higher than the rated voltage, the converter operates in Mode 2 through the VF and phase-shift control strategy until the switching frequency reaches the upper limit. Then, the converter operates in Mode 3 through the constant-frequency and phase-shift control strategy. The secondary-side diode current will operate in the discontinuous current mode in Modes 1 and 3, whereas it will operate in the boundary current mode in Mode 2. The current RMS value and conduction loss can be reduced in Mode 2. A detailed theoretical analysis of the operation principle, the voltage gain characteristics, and the realization method is presented in this paper. Finally, a 500 W prototype with 100-200 V input voltage and 40 V output voltage is built to verify the feasibility of the multimode hybrid control strategy.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2016년도 전력전자학술대회 논문집
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• pp.73-74
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• 2016

This paper proposes a wide output range AC/DC converter for a rechargeable battery of electric vehicle. In the proposed wide output range AC/DC converter for rechargeable battery of electric vehicle, the main transformer in the DC/DC stage is divided by two. Therefore, if the switch is connected to the middle tap, then half of the maximum voltage is applied. Otherwise, it can be applied the full range of the high voltage by connecting the switch to the whole tab. And also, it is designed to have a wide output voltage range by applying Vin/2 made by changing the full-bridge to half-bridge by using the bridge change switch of the input stage. As it can be supplied the wide range output voltage with a single module, it has the advantage of space utilization and cost reduction effect.

• 전자공학회논문지B
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• 제31B권10호
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• pp.73-81
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• 1994

It is AGC(Automatic Gain Control) amplifier to decide characteristics of IF(Intermediate Frequency) processing IC. When demodulated IF signal by PLL type demodulator, the amplitude of input singla should be maintained at a certain amplitude. The AGC amplifier is an important factor to achieve this condition. The AGC amplifier needs the wide dynamic range, the wide AGC range and better noise characteristics. We designed the AGC amplifier to satisfy these characteristics.

• 대한전자공학회논문지SD
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• 제49권4호
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• pp.34-42
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• 2012

본 논문에서는 무선전력전송 시스템 수신부의 넓은 입력 범위의 CMOS 다중 모드 정류기를 설계하였다. 다중 모드 정류기의 출력전압을 비교기로 감지하고, 스위치를 컨트롤 하여 정류기 모드를 전환한다. 다중 모드 정류기는 입력 전압의 크기에 따라 자동으로 전파 정류기, 1단 전압 체배기, 2단 전압 체배기로 동작한다. 일반적인 전파 정류기는 10 V에서 20 V까지의 입력 AC 전압에 대해 9 V에서 19 V까지의 출력 DC 전압을 생성할 수 있다. 다중 모드 정류기는 전파 정류기 보다 입력 범위를 5 V 향상시켜서 5 V에서 20 V까지의 입력 AC 전압에 대해 출력 DC 전압은 7.5 V에서 19 V까지 생성되는 것을 보여준다. 다중 모드 정류기의 효율은 전파 정류기 모드에서 94%이다. 제안하는 다중 모드 정류기는 0.35${\mu}m$ BCD 공정으로 설계되었고, 면적은 $2500{\mu}m{\times}1750{\mu}m$ 이다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 전력전자학술대회
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• pp.434-435
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• 2018

In this paper, a single-phase single-stage three-level AC/DC converter with a wide controllable output voltage is presented. It integrates a PFC converter and a three level DC/DC converter into one. The proposed converter operates at a fixed frequency and provides a wide controllable output voltage ($200V_{dc}-430V_{dc}$) with high efficiencies over a wide load range. In addition, the input boost inductors operate in a discontinuous mode to improve the input power factor. Moreover, all the switching devices operate with ZVS, and the converter's THD is small especially at full load. The feasibility of the proposed converter is verified with experimental results of a 1.5kW prototype.

• Journal of Power Electronics
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• 제19권1호
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• pp.34-43
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• 2019

An improved half-bridge LLC converter with a magamp auxiliary post-regulator is proposed in this paper. The function of the magamp is bypassed when the converter works within the low input-voltage range. Meanwhile, it operates as an auxiliary post-regulator when the input voltage is high. By changing the blocking time of the magamp, the dc gain of the converter can be extended. Hence, the input voltage range of the converter is extended. The realization of proposed topology does not require a complicated circuit. The controller of the magamp can be easily implemented using only passive components, transistors and an OP amp. The generalized operational principle is analyzed and the design criterion for the magamp is presented. Finally, a 25V output, 400W experimental prototype was built and tested for a 160-300V input-voltage range to verify the feasibility of the proposed method.

• Journal of Power Electronics
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• 제16권6호
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• pp.2024-2034
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• 2016

This paper presents a DC-DC buck converter with a Phase-Locked Loop (PLL) that can compensates for power efficiency degradation over a wide input range. Its switching frequency is kept at 2 MHz and the delay difference between the High side driver and the Low side driver can be minimized with respect to Process, Voltage and Temperature (PVT) variations by adopting the PLL. The operation mode of the proposed DC-DC buck converter is automatically changed to Pulse Width Modulation (PWM) or PWM frequency modes according to the load condition (heavy load or light load) while supporting a maximum load current of up to 1.2 A. The PWM frequency mode is used to extend the CCM region under the light load condition for the PWM operation. As a result, high efficiency can be achieved under the light load condition by the PWM frequency mode and the delay compensation with the PLL. The proposed DC-DC buck converter is fabricated with a $0.18{\mu}m$ BCD process, and the die area is $3.96mm^2$. It is implemented to have over a 90 % efficiency at an output voltage of 5 V when the input range is between 8 V and 20 V. As a result, the variation in the power efficiency is less than 1 % and the maximum efficiency of the proposed DC-DC buck converter with the PLL is 95.4 %.

• Journal of Power Electronics
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• 제10권2호
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• pp.115-124
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• 2010

In this paper, a simple yet efficient auto mode-hop ripple control structure for buck converters with light load operation enhancement is proposed. The converter, which operates under a wide range of input and output voltages, makes use of a state-dependent hysteretic comparator. Depending on the output current, the converter automatically changes the operating mode. This improves the efficiency and reduces the output voltage ripple for a wide range of output currents for given input and output voltages. The sensitivity of the output voltage to the circuit elements is less than 14%, which is seven times lower than that for conventional converters. To assess the efficiency of the proposed converter, it is designed and implemented with commercially available components. The converter provides an output voltage in the range of 0.9V to 31V for load currents of up to 3A when the input voltage is in the range of 5V to 32V. Analytical design expressions which model the operation of the converter are also presented. This circuit can be implemented easily in a single chip with an external inductor and capacitor for both fixed and variable output voltage applications.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.340-343
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• 1999

In this paper, we propose a wide range PLL(Phase Locked Loop) for 64X CD-ROMs & l0X DVD-ROMs. The frequency locking range of the Proposed PLL is 75MHz~370MHz. To reduce jitters caused by large VCO gain and supply voltage noise, a new V-I converter and a differential delay cell are used in 3-stage ring VCO, respectively. The new V-I converter has a 0.6V ~ 2.5V wide input range. In addition, we propose a new charge pump which has perfect current matching characteristics for the sourcing/sinking current. This new charge pump improves the locking time and the locking range of the PLL. This Chip is implemented in 0.25${\mu}{\textrm}{m}$ CMOS process. It consumes 55㎽ in worst case with a single 2.5V power supply.

• 전자공학회논문지D
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• 제36D권8호
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• pp.62-67
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• 1999

본 논문에서는 반도체 광 증폭기내에서 상호 이득변조 방식을 이용한 파장변환기의 입력 다이너믹 영역을 넓히기 위한 구조를 제안하였다. 파장변환기에서의 성능의 척도가 되는 파워 패널티에 대한 입력 펌프 및 프로우브 광 세기의 영향을 조사하였으며, 그 결과 프로우브광의 세기가 펌프광의 세기보다 약 3 dB, 낮은 경우에 최적의 BER 성능을 보였다. 이러한 특성을 이용하여 입력 펌프광의 세기를 감지하고 그에 따라 프로우브 광원에 가해지는 바이어스 전류로 프로우브 광의 세기를 제어하는 파장변환기 구조를 제안하였다. 따라서 넓은 입력 다이너믹 영역을 가지는 파장변환기를 구현할 수 있으며, 2.5 Gb/s 광신호에 대해 20 dB 이상의 입력 다이너믹 영역을 얻었다.