• Title/Summary/Keyword: wafer direct bonding

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Direct Bonding Characteristics of 2" 3C-SiC Wafers for Harsh Environment MEMS Applications (극한 환경 MEMS용 2" 3C-SiC기판의 직접접합 특성)

  • 정귀상
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.8
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    • pp.700-704
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    • 2003
  • This paper describes on characteristics of 2" 3C-SiC wafer bonding using PECVD (plasma enhanced chemical vapor deposition) oxide and HF (hydrofluoride acid) for SiCOI (SiC-on-Insulator) structures and MEMS (micro-electro-mechanical system) applications. In this work, insulator layers were formed on a heteroepitaxial 3C-SiC film grown on a Si (001) wafer by thermal wet oxidation and PECVD process, successively. The pre-bonding of two polished PECVD oxide layers made the surface activation in HF and bonded under applied pressure. The bonding characteristics were evaluated by the effect of HF concentration used in the surface treatment on the roughness of the oxide and pre-bonding strength. Hydrophilic character of the oxidized 3C-SiC film surface was investigated by ATR-FTIR (attenuated total reflection Fourier transformed infrared spectroscopy). The root-mean-square suface roughness of the oxidized SiC layers was measured by AFM (atomic force microscope). The strength of the bond was measured by tensile strength meter. The bonded interface was also analyzed by IR camera and SEM (scanning electron microscope), and there are no bubbles or cavities in the bonding interface. The bonding strength initially increases with increasing HF concentration and reaches the maximum value at 2.0 % and then decreases. These results indicate that the 3C-SiC wafer direct bonding technique will offers significant advantages in the harsh MEMS applications.ions.

A study on pre-bonding mechanism of Si wafer at HF pre-treatment (HF 전처리시 실리콘 기판의 초기접합 메카니즘에 관한 연구)

  • Kang, Kyung-Doo;Park, Chin-Sung;Lee, Chae-Bong;Ju, Byung-Kwon;Chung, Gwiy-Sang
    • Proceedings of the KIEE Conference
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    • 1999.07g
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    • pp.3313-3315
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    • 1999
  • Si direct bonding(SDB) technology is very attractive for both Si-on-insulator(SOI) electric devices and MEMS applications because of its stress free structure and stability. This paper presents on pre-bonding according to HF pre-treatment conditions in Si wafer direct bonding. The characteristics of bonded sample were measured under different bonding conditions of HF concentration, and applied pressure. The bonding strength was evaluated by tensile strength method. The bonded interface and the void were analyzed by using SEM and IR camera respectively. A bond characteristic on the interface was analyzed by using IT- IR. Si-F bonds on Si surface after HF pre-treatment are replaced by Si-OH during a DI water rinse. Consequently, hydrophobic wafer was bonded by hydrogen bonding of Si $OH{\cdots}(HOH{\cdots}HOH{\cdots}HOH){\cdots}OH-Si$. The bond strength depends on the HF pre-treatment condition before pre- bonding (Min:$2.4kgf/crn^2{\sim}Max:14.9kgf/crn^2$)

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Low Temperature Bonding Process of Silicon and Glass using Spin-on Glass (Spin-on Glass를 이용한 실리콘과 유리의 저온 접합 공정)

  • Lee Jae-Hak;Yoo Choong-Don
    • Journal of Welding and Joining
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    • v.23 no.6
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    • pp.77-86
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    • 2005
  • Low temperature bonding of the silicon and glass using the Spin-on Glass (SOG) has been conducted experimentally to figure out the effects of the SOG solution composition and process variables on bond strength using the Design of Experiment method. In order to achieve the high quality bond interface without rack, sufficient reaction time of the optimal SOG solution composition is needed along with proper pressure and annealing temperature. The shear strength under the optimal SOG solution composition and process condition was higher than that of conventional anodic bonding and similar to that of wafer direct bonding.

Fabrication of MEMS Devices Using SOI(Silicon-On-Insulator)-Micromachining Technology (SOI(Silicon-On-Insulator)- Micromachining 기술을 이용한 MEMS 소자의 제작)

  • 주병권;하주환;서상원;최승우;최우범
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.874-877
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    • 2001
  • SOI(Silicon-On-Insulator) technology is proposed as an alternative to bulk silicon for MEMS(Micro Electro Mechanical System) manufacturing. In this paper, we fabricated the SOI wafer with uniform active layer thickness by silicon direct bonding and mechanical polishing processes. Specially-designed electrostatic bonding system is introduced which is available for vacuum packaging and silicon-glass wafer bonding for SOG(Silicon On Glass) wafer. We demonstrated thermopile sensor and RF resonator using the SOI wafer, which has the merits of simple process and uniform membrane fabrication.

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High Speed Direct Bonding of Silicon Wafer Using Atmospheric Pressure Plasma (상압 플라즈마를 이용한 고속 실리콘 웨이퍼 직접접합 공정)

  • Cha, Yong-Won;Park, Sang-Su;Shin, Ho-Jun;Kim, Yong Taek;Lee, Jung Hoon;Suh, Il Woong;Choa, Sung-Hoon
    • Journal of the Microelectronics and Packaging Society
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    • v.22 no.3
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    • pp.31-38
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    • 2015
  • In order to achieve a high speed and high quality silicon wafer bonding, the room-temperature direct bonding using atmospheric pressure plasma and sprayed water vapor was developed. Effects of different plasma fabrication parameters, such as flow rate of $N_2$ gas, flow rate of CDA (clear dry air), gap between the plasma head and wafer surface, and plasma applied voltage, on plasma activation were investigated using the measurements of the contact angle. Influences of the annealing temperature and the annealing time on bonding strength were also investigated. The bonding strength of the bonded wafers was measured using a crack opening method. The optimized condition for the highest bonding strength was an annealing temperature of $400^{\circ}C$ and an annealing time of 2 hours. For the plasma activation conditions, the highest bonding strength was achieved at the plasma scan speed of 30 mm/sec and the number of plasma treatment of 4 times. After optimization of the plasma activation conditions and annealing conditions, the direct bonding of the silicon wafers was performed. The infrared transmission image and the cross sectional image of bonded interface indicated that there is no void and defects on the bonded wafers. The bonded wafer exhibited a bonding strength of average $2.3J/m^2$.

Direct Bonding of SillSiO2/Si3N4llSi Wafer Fairs with a Fast Linear Annealing (선형가열기를 이용한 SillSiO2/Si3N4llSi 이종기판쌍의 직접접합)

  • 이상현;이상돈;송오성
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.4
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    • pp.301-307
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    • 2002
  • Direct bonded SOI wafer pairs with $Si ll SiO_2/Si_3N_4 ll Si$ the heterogeneous insulating layers of SiO$_2$-Si$_3$N$_4$are able to apply to the micropumps and MEMS applications. Direct bonding should be executed at low temperature to avoid the warpage of the wafer pairs and inter-diffusion of materials at the interface. 10 cm diameter 2000 ${\AA}-SiO_2/Si(100}$ and 560 $\AA$- ${\AA}-Si_3N_4/Si(100}$ wafers were prepared, and wet cleaned to activate the surface as hydrophilic and hydrophobic states, respectively. Cleaned wafers were pre- mated with facing the mirror planes by a specially designed aligner in class-100 clean room immediately. We employed a heat treatment equipment so called fast linear annealing(FLA) with a halogen lamp to enhance the bonding of pre mated wafers We kept the scan velocity of 0.08 mm/sec, which implied bonding process time of 125 sec/wafer pairs, by varying the heat input at the range of 320~550 W. We measured the bonding area by using the infrared camera and the bonding strength by the razor blade clack opening method, respective1y. It was confirmed that the bonding area was between 80% and to 95% as FLA heat input increased. The bonding strength became the equal of $1000^{\circ}C$ heat treated $Si ll SiO_2/Si_3N_4 ll Si$ pair by an electric furnace. Bonding strength increased to 2500 mJ/$\textrm{m}^2$as heat input increased, which is identical value of annealing at $1000^{\circ}C$-2 hr with an electric furnace. Our results implies that we obtained the enough bonding strength using the FLA, in less process time of 125 seconds and at lowed annealing temperature of $400^{\circ}C$, comparing with the conventional electric furnace annealing.

Si Micromachining for MEMS-IR Sensor Application (결정의존성 식각/기판접합을 이용한 MEMS용 구조물의 제작)

  • 박홍우;주병권;박윤권;박정호;김철주;염상섭;서상회;오명환
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.11 no.10
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    • pp.815-819
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    • 1998
  • The silicon-nirtide membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PRO($PbTiO_3$ ) layer for a IR detection was coated on the membrane and its characteristics were measured. The a attack of PTO layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer were eliminated through the method of bonding/etching of silicon wafer. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by the PTO layer were measured, too.

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III-V/Si Optical Communication Laser Diode Technology (광통신 III-V/Si 레이저 다이오드 기술 동향)

  • Kim, H.S.;Kim, D.J.;Kim, D.C.;Ko, Y.H.;Kim, K.J.;An, S.M.;Han, W.S.
    • Electronics and Telecommunications Trends
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    • v.36 no.3
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    • pp.23-33
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    • 2021
  • Two main technologies of III-V/Si laser diode for optical communication, direct epitaxial growth, and wafer bonding were studied. Until now, the wafer bonding has been vigorously studied and seems promising for the ideal III-V/Si laser. However, the wafer bonding process is still complicated and has a limit of mass production. The development of a concise and innovative integration method for silicon photonics is urgent. In the future, the demand for high-speed data processing and energy saving, as well as ultra-high density integration, will increase. Therefore, the study for the hetero-junction, which is that the III-V compound semiconductor is directly grown on Si semiconductor can overcome the current limitations and may be the goal for the ideal III-V/Si laser diode.

Etching-Bonding-Thin film deposition Process for MEMS-IR SENSOR Application (MEMS-IR SENSOR용 식각-접합-박막증착 기반공정)

  • Park, Yun-Kwon;Joo, Byeong-Kwon;Park, Heung-Woo;Park, Jung-Ho;Yom, S.S.;Suh, Sang-Hee;Oh, Myung-Hwan;Kim, Chul-Ju
    • Proceedings of the KIEE Conference
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    • 1998.07g
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    • pp.2501-2503
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    • 1998
  • In this paper, the silicon-nitride membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PTO layer as a IR detection layer was deposited on the membrane and its characteristics were measured. The attack of PTO layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer can be solved through the method of bonding/etching of silicon wafer. Because the PTO layer of c-axial orientation raised thermal polarization without polling, the more integration capability can be achieved. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by IR detector, and the bonding interface was observed by SEM. The polarization characteristics and the dielectric characteristics of the PTO layer were measured, too.

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The Effect of Hydrogen Plasma on Surface Roughness and Activation in SOI Wafer Fabrication

  • Park, Woo-Beom;Kang, Ho-Cheol;Sung, Man-Young
    • Transactions on Electrical and Electronic Materials
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    • v.1 no.1
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    • pp.6-11
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    • 2000
  • The hydrogen plasma treatment of silicon wafers in the reactive ion-etching mode was studied for the application to silicon-on-insulator wafers which were prepared using the wafer bonding technique. The chemical reactions of hydrogen plasma with surface were used for both surface activation and removal of surface contaminants. As a result of exposure of silicon wafers to the plasma, an active oxide layer was found on the surface. This layer was rendered hydrophilic. The surface roughness and morphology were examined as functions of the plasma exposing time and power. In addition, the surface became smoother with the shorter plasma exposing time and power. The value of initial surface energy estimated by the crack propagation method was 506 mJ/㎡, which was up to about three times higher as compared to the case of conventional direct using the wet RCA cleaning method.

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