• Journal of Sensor Science and Technology
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• v.21 no.1
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• pp.34-38
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• 2012

We have developed a cost effective test socket for ball grid array(BGA) integrated circuit(IC) packages using BeCu metal sheet as a test probe. The BeCu furnishes the best combination of electrical conductivity and corrosion resistance. The probe of the test socket was designed with a BeCu cantilever. The cantilever was designed with a length of 450 ${\mu}m$, a width of 200 ${\mu}m$, a thickness of 10 ${\mu}m$, and a pitch of 650 ${\mu}m$ for $11{\times}11$ BGA. The fabrication of the test socket used techniques such as through-silicon-via filling, bonding silicon wafer and BeCu metal sheet with dry film resist(DFR). The test socket is applicable for BGA IC chip.

• Journal of Sensor Science and Technology
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• v.13 no.3
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• pp.175-181
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• 2004

A pressure sensor for high temperature was fabricated by using a SDB(Silicon-Direct-Bonding) wafer with a Si/$SiO_{2}$/ Si structure. High pressure sensitivity was shown from the sensor using a single crystal silicon of the first layer as a piezoresistive layer. It also was made feasible to use under the high temperature as of over $120^{\circ}C$, which is generally known as the critical temperature for the general silicon sensor, by isolating the piezoresistive layer dielectrically and thermally from the silicon substrate with a silicon dioxide layer of the second layer. The pressure sensor fabricated in this research showed very high sensitivity as of $183.6{\mu}V/V{\cdot}kPa$, and its characteristics also showed an excellent linearity with low hysteresis. This sensor was usable up to the high temperature range of $300^{\circ}C$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.4
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• pp.263-268
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• 2001

This paper describes the effects of applied bias conditions on electrochemical etch-stop characteristics. THere are a number of key issues such as diode leakage and ohmic losses which arise when applying the conventional 3-electrochemical etch-stop to fabricated some of he MEMS(microelectro mechanical system) and SOI(Si-on-insulator) structures which employ SDB(Si-wafer direct bonding). This work allows to perform anin situ diagnostic to predict whether or not an electrochemical etch-stop would fail due to diode-leakage-induced premature passivation. In addition, it presents technology which takes into account the effects of ohmic losses and allows to calculate the appropriate bias necessary to obtain a successful electrochemical etch-stop.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.597-598
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• 2006

This paper describes a development of a new $1.4{\times}1.1$ and $2.0{\times}1.4mm$ RF SAW filters made by PCB substrate instead of HTCC package, and this technology can reduce the cost of materials down to 40%. We have investigated the multi-layered PCB substrate structures and raw materials to find out the optimal flip-bonding condition between the $LiTaO_3$ wafer and PCB substrates. Also the optimal materials and processing conditions of epoxy laminating film were found out through the experiments which can reduce the bending moment caused by the difference of the thermal expansion between the PCB substrate and laminating film. The new PCB SAW filter shows good electrical and reliability performances with respect to the present SAW filters.

• Journal of the Korean Ceramic Society
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• v.44 no.11
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• pp.650-654
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• 2007

[ $SnO_2$ ]-doped $TiO_2$ thin films were prepared from tin (IV) bis (acetylacetonate) dichloride and titanium diisopropoxide bis (acetylacetonate) with pluronic P123 or degussa P25 as a structural-directing agent. These hydrolyzed sol were spin coated onto Si(100) wafer substrate. The microstructure, morphology and bonding states of thin films were studied by field-emission scanning electron microscopy (FE-SEM), X-ray diffractometry (XRD), and X-ray photoelectron spectroscopy (XPS). The photocatalytic activity of these films was investigated by using indigo carmine solution.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.557-560
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• 2000

Combination of SDB(Si-wafer Direct Bonding) and electrochemical etch-stop in TMAH anisotropic etchant can be used to create a variety of MEMS(Micro Electro Mechanical System). Especially, fabrication of SDB SOI structures using electrochemical etch-stop is accurate method to fabrication of 3D(three-dimensional) microstructures. This paper describes on the fabrication of SDB SOI structures with sealed cavity for MEMS applications and thickness control of active layer on the SDB SOI structure by electrochemical etch-stop. The flatness of fabricated SDB SOI structure is very uniform and can be improved by addition of TMAH to IPA and pyrazine.

• Journal of the Microelectronics and Packaging Society
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• v.9 no.4
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• pp.25-29
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• 2002

We have fabricated a vertical trench Hall device which is sensitive to the magnetic field parallel to the sensor surface. The vertical trench Hall device has been built on SOI wafer which is produced by silicon direct bonding technology using bulk micromachining, where buried $SiO_2$ layer and surround trench define active device volume. Sensitivity up to 150 V/AT has been measured.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.579-582
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• 2000

This paper described on the fabrication of SOI(Si-on-insulator) structures with buried cavities by SDB technology and eletrochemical etch-stop. The cavity was fabricated the upper handling wafer by Si anisotropic etch technique. SDB process was performed to seal the fabricated cavity under vacuum condition at -760mmHg. In the SDB process, captured air and moisture inside of the cavities were removed by making channels towards outside. After annaling(100$0^{\circ}C$, 60 min.), the SDB SOI structure was thinned by electrochemical etch-stop. Finally, it was fabricated the SDB SOI structure with buried cavities as well as an accurate control and a good flatness.

• Proceedings of the KIEE Conference
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• 2003.07c
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• pp.1920-1922
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• 2003

We have fabricated the pyrex glass microlens using thermal reflow process. Fabricated microlens is the plano convex refractive type and was fabricated with pyrex glass-Si anodic bonding wafer. The etched circle or cylindrical pyrex glass pattern was melted in a furnace $800^{\circ}C$ to $900^{\circ}C$ for about 15min. The surface roughness of the microlenses was measured by the AFM and average surface roughness of the microlenses was below 15min. The radius of curvature of the microlens was measured with phase shift interferometer.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2015.05a
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• pp.31-31
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• 2015

본 연구는, TAB(Tape Automated Bonding)접속이나 Flip Chip 접속에 의한 패캐징을 실현시키기 위해, 실리콘 웨이퍼 표면에 구리 필러 및 주석 합금을 전기 도금법으로 형성하는 전기 접점용 범프에 관한 것이다. 본 연구에서는, 균일 범프 두께, 범프 표면의 균일화, 범프 내의 보이드 발생 문제 해결, 균일한 합금 조성 및 도금 속도의 고속화를 위해, Cu 도금액 및 Sn-Ag 도금액의 첨가제에 의한 표면 형상의 제어를 중심으로 그 성능에 대해 보고한다.