• 반도체디스플레이기술학회지
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• 제23권2호
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• pp.135-142
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• 2024

Cu-Cu bonding, one of the key technologies in advanced packaging, enhances semiconductor chip performance, miniaturization, and energy efficiency by facilitating rapid data transfer and low power consumption. However, the quality of the interface bonding can significantly impact overall bond quality, necessitating strategies to quickly detect and classify in-process defects. This study presents a methodology for detecting defects in wafer junction areas from Scanning Acoustic Microscopy images using a ResNet-50 based deep learning model. Additionally, the use of the defect map is proposed to rapidly inspect and categorize defects occurring during the Cu-Cu bonding process, thereby improving yield and productivity in semiconductor manufacturing.

• 전자공학회논문지A
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• 제32A권3호
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• pp.134-142
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• 1995

We discovered that each distinct shape of the roof-shaped peaks of (111) facets, which are generated on (110) cross-section of the directly bonded (100) silicon wafer pairs after KOH etching, can be mapped to one of three conditions of the interfacial oxide existing at the bonding interface as follows. That is, thick solid line can be mapped to stabilization, thin solid line to disintegration, and thin broken line to spheroidization. also we confirmed that most of the interfacial oxides of a well-aligned wafer pairs were disintegrated and spheroidized through high-temperature annealing process above 900$^{\circ}$C while the oxide was stabilized persistently when two wafers are bonded rotationally around their common axis perpendicular to the wafer planes.

• 한국정밀공학회지
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• 제16권5호통권98호
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• pp.40-47
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• 1999

In CMP for semiconductor wafer films, the acceptable within-chip planarity, within-wafer and wafer-to-wafer nonuniformity could be achieved by conditioning. The role of conditioning is to remove continuously polishing residues from pad and to maintain the initial pad surface pores. To reach these requirements, the diamond grits disk has been considered as a conventional conditioner. However, we have investigated many defects as scratch on wafers out of diamond grits shedding, contaminations from bonding materials, and pad pore subsidences by over-conditioning. So, this paper studies the effect of ultrasonic vibration in CMP conditioning as a representative. The effect of ultrasonic vibration was certified through ILD, Metal CMP.

• 한국표면공학회지
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• 제29권5호
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• pp.482-486
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• 1996

The progress of microelectronics technology has been requiring agressive developments of device technologies. Also the requirements of the next generation devices is heading to the limits of their functions and materials, and hence asking the very specific silicon wafer such as SOI(Silicon On Insulator) wafer. The talk covers the dome stic and world-wide status of SOI device developments and applications. The presentation will also touch some predictions such as SOI device prgress schedules, impacts on the normal wafer developments, market sizes, SOI wafer prices, and so on. Finally it will cover technical aspects which are silicon oxide conditions for bonding, point defects and, surface contaminations. These points will be hopefully overcome by involved people in microelectronics industry.

• 센서학회지
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• 제28권3호
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• pp.152-156
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• 2019

An ultraviolet (UV) image sensor is an extremely important optoelectronic device used in scientific and medical applications because it can detect images that cannot be obtained using visible or infrared image sensors. Because photodetectors and transistors are based on different materials, conventional UV imaging devices, which have a hybrid-type structure, require additional complex processes such as a backside etching of a GaN epi-wafer and a wafer-to-wafer bonding for the fabrication of the image sensors. In this study, we developed a monolithic GaN UV passive pixel sensor (PPS) by integrating a GaN-based Schottky-barrier type transistor and a GaN UV photodetector on a wafer. Both individual devices show good electrical and photoresponse characteristics, and the fabricated UV PPS was successfully operated under UV irradiation conditions with a high on/off extinction ratio of as high as $10^3$. This integration technique of a single pixel sensor will be a breakthrough for the development of GaN-based optoelectronic integrated circuits.

• 한국전기전자재료학회논문지
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• 제15권10호
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• pp.883-888
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• 2002

SiC direct bonding technology is very attractive for both SiCOI(SiC-on-insulator) electric devices and SiC-MEMS(micro electro mechanical system) fields because of its application possibility in harsh environments. This paper presents pre-bonding techniques with variation of HF pre-treatment conditions for SiC wafer direct bonding using PECVD(plasma enhanced chemical vapor deposition) oxide. The PECYD oxide was characterized by XPS(X-ray photoelectron spectrometer) and AFM(atomic force microscopy). The characteristics of the bonded sample were measured under different bonding conditions of HF concentration and an applied pressure. The bonding strength was evaluated by the tensile strength method. The bonded interface was analyzed by using SEM(scanning electron microscope). Components existed in the interlayer were analyzed by using FT-IR(fourier transform infrared spectroscopy). The bonding strength was varied with HF pre-treatment conditions before the pre-bonding in the range of 5.3 kgf/cm$^2$to 15.5 kgf/cm$^2$.

• 센서학회지
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• 제3권2호
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• pp.74-80
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• 1994

Silicon direct bonding 기술은 잔류 응력이 없고, 안정한 특성을 가진 센서의 제작과 silicon-on-insulator 소자의 제조에 널리 이용되고 있다. SDB의 공정 절차는 크게 실리콘 웨이퍼의 수산화 공정 과정과 wet oxidation fumace에서 고온의 열처리 공정 과정을 거치게 된다. 수산화 공정을 행한 후, Fourier transformation-infrared spectroscopy를 사용하여 실리콘 웨이퍼 표면을 분석하여 보면, 실리콘 웨이퍼의 표면에서는 수산화기가 생성됨을 알 수 있다. 실험 결과, $H_{2}O_{2}\;:\; H_{2}SO_{4}$ 용액을 사용한 친수성 용액 처리의 경우에 있어서는 수산화기가 3474 $cm^{-1}$ 주위의 넓은 영역에서 관찰되었다. 그러나, diluted HF 용액의 경우에 있어서는 수산화기가 관찰되지 않았다. 접합된 실리콘웨이퍼를 tetramethylammonium hydroxide 식각 용액을 사용하여 식각 공정을 수행하였다. 식각 공정은 자동 식각 중지가 수행되었으며, 식각된 표면은 평탄하고 균일하였다. 그러므로, 이러한 SDB 기술은 우수한 특성을 가진 압력, 유속, 가속도 센서 등과 같은 센서의 제작 및 센서 응용 분야에 이용될 수 있을 것이다.

• 센서학회지
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• 제27권5호
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• pp.300-305
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• 2018

The uncooled microbolometer thermal sensor for low cost and mass volume was designed to target the new infrared market that includes smart device, automotive, energy management, and so on. The microbolometer sensor features 80x60 pixels low-resolution format and enables the use of wafer-level vacuum packaging (WLVP) technology. Read-out IC (ROIC) implements infrared signal detection and offset correction for fixed pattern noise (FPN) using an internal digital to analog convertor (DAC) value control function. A reliable WLVP thermal sensor was obtained with the design of lid wafer, the formation of Au80%wtSn20% eutectic solder, outgassing control and wafer to wafer bonding condition. The measurement of thermal conductance enables us to inspect the internal atmosphere condition of WLVP microbolometer sensor. The difference between the measurement value and design one is $3.6{\times}10-9$ [W/K] which indicates that thermal loss is mainly on account of floating legs. The mean time to failure (MTTF) of a WLVP thermal sensor is estimated to be about 10.2 years with a confidence level of 95 %. Reliability tests such as high temperature/low temperature, bump, vibration, etc. were also conducted. Devices were found to work properly after accelerated stress tests. A thermal camera with visible camera was developed. The thermal camera is available for non-contact temperature measurement providing an image that merged the thermal image and the visible image.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2012년도 추계학술대회 논문집
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• pp.483-484
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• 2012

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2013년도 춘계학술대회 논문집
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• pp.837-838
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• 2013