• Title/Summary/Keyword: voltage-lift

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The Lift-off and Fall-down Characteristics due to Particles in Coaxial Electrode (동축원통 전극내 금속이물의 부상 및 하강전압 특성)

  • Lee, Jae-Gul;Lee, Kon;Jin, Sang-Bum;Park, Hyun-Su;Cho, Kook-Hee;Kim, Kyong-Hwa;Kwak, Hee-Ro
    • Proceedings of the KIEE Conference
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    • 1998.07e
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    • pp.1711-1713
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    • 1998
  • This paper describes the insulation characteristics of GIS by the free conducting particles under alternating voltage. The particles of the GIS can cause decrease in breakdown voltages. Various materials and sizes of free conducting particles were used to study the lift-off and fall-down characteristics. The measured lift-off voltage for copper particle agreed with the calculated one.

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High Voltage SMPS Design based on Dual-Excitation Flyback Converter (이중 여자 플라이백 기반 고압 SMPS 설계)

  • Yang, Hee-Won;Kim, Seong-Ae;Park, Seong-Mi;Park, Sung-Jun
    • Journal of the Korean Society of Industry Convergence
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    • v.20 no.2
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    • pp.115-124
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    • 2017
  • This paper aims to develop an SMPS topology for handling a high range of input voltages based on a DC-DC flyback converter circuit. For this purpose, 2 capacitors of the same specifications were serially connected on the input terminal side, with a flyback converter of the same circuit configuration serially connected to each of them, so as to achieve high input voltage and an effect of dividing input voltage. The serially connected flyback converters have the transformer turn ratio of 1:1, so that each coil is used for the winding of a single transformer, which is a characteristic of doubly-fed configuration and enables the correction of input capacitor voltage imbalance. In addition, a pulse transformer was designed and fabricated in a way that can achieve the isolation and noise robustness of the PWM output signal of the PWM controller that applies gate voltage to individual flyback converter switches. PSIM simulation was carried out to verify such a structure and confirm its feasibility, and a 100W class stack was fabricated and used to verify the feasibility of the proposed high voltage SMPS topology.

High Efficiency Strategy of High Input Voltage SMPS (고전압 입력용 SMPS의 고효율 전략)

  • Woo, Dong-Young;Park, Seong-Mi;Park, Sung-Jun
    • Journal of the Korean Society of Industry Convergence
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    • v.22 no.3
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    • pp.365-371
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    • 2019
  • Recently, the demonstration and research on the power transmission using high voltage DC such as HVDC(High Voltage DC), Smart Grid, DC transmission and distribution have been actively conducted. In order to control the power converter in high-voltage DC power transmission system, SMPS(Switching Modulation Power Supply) for power converter control using high-voltage DC input is essential. However, the demand for high-pressure SMPS is still low, so the development is not enough. In the low-output SMPS using the high-voltage input, it is difficult to achieve high efficiency due to the switching transient loss especially at light load. In this paper, we propose a new switching scheme for high power SMPS control for low output power. The proposed method can provide better efficiency increase effect in the light load region compared to the existing PWM method. To verify the feasibility of the proposed method, a 40 W SMPS for HVDC MMC(Modulation Multi-level Converter) was designed and verified by simulation.

The Evaluation of Surface Crack in Paramagnetic Material by FEF Technique (FEF 탐상법을 이용한 상자성체 표면결함 평가)

  • Kim, Hoon
    • Journal of the Korean Society for Nondestructive Testing
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    • v.24 no.5
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    • pp.532-537
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    • 2004
  • FEF(Focused Electromagnetic Field) technique was newly developed that is based on the induction principle exciting electromagnetic field. The technique consists of an induction wire and a sensor for detecting electromagnetic field, and is applied in a non-contact mode. In this study, the technique was applied to the evaluation of EDM slits in some conductive materials - aluminum alloy, stainless steel and Inconel alloy. The voltage in the non-defect region is depended upon the measurement lift-off. The voltage signals on defects are measured with peak values, and the peak values changed with the depth of defects. The voltage distributions for all conductive materials are the same trend.

Bidirectional DC-DC Converter Based on Quasi-Sepic for Battery Charging System

  • Zhang, Hailong;Chen, Yafei;Kim, Dong-Hee;Park, Sung-Jun;Park, Seong-Mi
    • Journal of the Korean Society of Industry Convergence
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    • v.23 no.2_1
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    • pp.139-147
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    • 2020
  • In order to satisfy the voltage levels of the low voltage battery side and high voltage DC bus, a high voltage gain with bidirectional operation is required. In this system, the cost effectiveness of the design is a critical factor; therefore, the system should be designed using a small number of components. This paper propose a novel bidirectional converter composed with a quasi-sepic and switched-indictor network. The proposed converter consists a small number of components with a high voltage gain ratio. Detailed analysis are made with respect to the operating mode, number of components, voltage and current ripple and efficiency. To verify performance of the proposed converter, simulation was performed is this paper. The simulation results are shown to verify the feasibility and performance of the proposed bidirectional converter.

Analysis of Stability and Dynamic Behaviour of Ultra Lift Luo Converter

  • Raji, J.;Kamaraj, V.
    • Journal of Electrical Engineering and Technology
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    • v.12 no.5
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    • pp.1970-1979
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    • 2017
  • Ultra Lift Luo Converter (ULC) gained considerable research interest in recent years. The stability analysis of voltage mode and peak current mode controlled ULC in continuous conduction mode is analyzed in this paper. The Eigen value theory is used for the stability analysis of voltage mode controlled ULC. Then to characterize the dynamics of inner current loop, the expressions of closed loop transfer function and loop gain are determined. An algorithm has been developed to analyze the stability of the peak current mode controlled ULC. The theoretical results are correlated with the simulation results obtained using PSIM 9.1(SMARTCTRL 1.0) software. Finally it is proposed to fabricate a prototype and validate the performance by suitable experimental setup.

Lift-Off Voltage and Partial Discharge Characteristics of Free Metallic Particles in GIS (GIS 내 금속입자의 부상전압과 부분방전특성 연구)

  • Yun, Jin-Yeol;Han, Sang-Ok
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.48 no.2
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    • pp.127-132
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    • 1999
  • Both motion of free metallic particles from which most GIS internal failures are caused and partial discharges from the particles were examined using EHV GIS test chamber. Effects from particle length and gas pressure which are main factors to lead to breakdown failure were investigated theoretically and experimentally. Magnitude of both lift-off voltage and partial discharge inception voltage were measured respectively and, through these measurements, this paper showed the possibility of predicting breakdown fault and of taking action to prevent the fault in advance. The measurement of partial discharge when the particles began to move could be adopted to decide minimum sensitivity in developing predictive diagnostic equipments. Both the amount of apparent discharge and real discharge in GIS were examined theoretically and experimentally, then experimental results were analyzed on the basis of the theory.

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The effect of particle on insulation Characteristic of $SF_6-N_2$ Mixtures ($SF_6-N_2$ 혼합가스의 절연특성에 미치는 파티클의 영향)

  • Lee, Kon;Lee, Dong-Zoon;Lee, Kang-Soo;Kim, Kyung-Wha;Kwak, Hee-Ro
    • Proceedings of the KIEE Conference
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    • 1999.07e
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    • pp.2383-2385
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    • 1999
  • This paper describes the effect of particles on insulation characteristics of $SF_6-N_2$ mixtures such as breakdown voltages, lift-off voltages and maximum discharge. As a result, the breakdown voltage was increased with the increment of $SF_6$ and the mixture containing 20[%] of $SF_6$ has a breakdown voltage ratio factor better than the other mixtures. The lift-off voltage was nearly constant with all mixtures. Discharge was decreased with the increment of $SF_6$.

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Improvement of LCC-HVDC Input-Output Characteristics using a VSC-MMC Structure

  • Kim, Soo-Yeon;Park, Seong-Mi;Park, Sung-Jun;Kim, Chun-Sung
    • Journal of the Korean Society of Industry Convergence
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    • v.24 no.4_1
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    • pp.377-385
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    • 2021
  • High voltage direct current(HVDC) systems has been an alternative method of a power transmission to replace high voltage alternate current(HVAC), which is a traditional AC transmission method. Due to technical limitations, Line commutate converter HVDC(LCC-HVDC) was mainly used. However, result from many structural problems of LCC-HVDC, the voltage source converter HVDC(VSC-HVDC) are studied and applied recently. In this paper, after analyzing the reactive power and output voltage ripple, which are the main problems of LCC-HVDC, the characteristics of each HVDC are summarized. Based on this result, a new LCC-HVDC structure is proposed by combining LCC-HVDC with the MMC structure, which is a representative VSC-HVDC topology. The proposed structure generates lower reactive power than the conventional method, and greatly reduces the 12th harmonic, a major component of output voltage ripple. In addition, it can be easily applied to the already installed LCC-HVDC. When the proposed method is applied, the control of the reactive power compensator becomes unnecessary, and there is an advantage that the cut-off frequency of the output DC filter can be designed smaller. The validity of the proposed LCC-HVDC is verified through simulation and experiments.

Position Control of Wafer Lift Pin for the Reduction of Wafer Slip in Semiconductor Process Chamber

  • Koo, Yoon Sung;Song, Wan Soo;Park, Byeong Gyu;Ahn, Min Gyu;Hong, Sang Jeen
    • Journal of the Semiconductor & Display Technology
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    • v.19 no.4
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    • pp.18-21
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    • 2020
  • Undetected wafer slip during the lift pin-down motion in semiconductor equipment may affect the center to edge variation, wafer warpage, and pattern misalignment in plasma equipment. Direct measuring of the amount of wafer slip inside the plasma process chamber is not feasible because of the hardware space limitation inside the plasma chamber. In this paper, we demonstrated a practice for the wafer lift pin-up and down motions with respect to the gear ratio, operating voltage, and pulse width modulation to maintain accurate wafer position using remote control linear servo motor with an experimentally designed chamber mockup. We noticed that the pin moving velocity and gear ratio are the most influencing parameters to be control, and the step-wised position control algorithm showed the most suitable for the reduction of wafer slip.