• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.8
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• pp.1046-1054
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• 2014

In this paper, a hardware prototype for the 10kVA 11-level MMC was built and various experimental works were conducted to verify the operation algorithms of MMC. The hardware prototype was designed using computer simulation with PSCAD/EMTDC software. After manufactured in the lab, the hardware prototype was tested to verify the modulation algorithms to form the output voltage, the balancing algorithm to equalize the sub-module capacitor voltage, and the redundancy operation algorithm to improve the system reliability. The developed hardware prototype can be utilized for analyzing the basic operation and performance improvement of MMC according to the modulation and redundancy operation scheme. It also can be utilize to analyze the basic operational characteristics of HVDC system based on MMC.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.12
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• pp.1640-1648
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• 2014

This paper proposes a switching frequency reduction method for MMC (Modular Multilevel Converter) utilizing redundancy operation of sub-module, which can offer reduction of voltage harmonics and switching loss. The feasibility of proposed method was verified through computer simulations with PSCAD/EMTDC software. Based on simulation analysis, a hardware scaled-model of 10kVA, DC-1000V MMC was designed and manufactured in the lab. Various experiments were conducted to verify the feasibility of proposed method in the actual hardware system. The hardware scaled-model can be effectively utilized for analyzing the performance of MMC according to the modulation scheme and redundancy operation.

• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.313-316
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• 2000

This paper proposes a new solution by carrier-based SVPWM method to solve the most serious problem of Flying Capacitor Multi-level Inverter that is unbalance of capacitor voltages The voltage unbalance is occurred by the difference of each capacitor's charging and discharging time applied to Flying Capacitor Multi-level Inverter. It controls the variation of capacitor voltages into the mean'0' during some period by means of new carriers using the leg voltage redundancy in the Inverter. The solution can be easily expanded to the multi-level. Also this method can make the switching loss and conduction loss of device equal by the use of leg voltage redundancy. First the unbalance of capacitor voltage is analyzed and the conventional theory of self-balance using phase-shifted carrier is reviewed. And then the new method that is suitable to the Flying Capacitor Inverter is explained. The simulation results would be shown to verify the proposed method

• Proceedings of the KIPE Conference
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• 2014.07a
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• pp.209-210
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• 2014

In this paper, a hardware prototype for the 10kVA 11-level MMC was built and various experimental works were conducted to verify the operation algorithms of MMC. The hardware prototype was designed using computer simulation with PSCAD/EMTDC software. After manufactured in the lab, the hardware prototype was tested to verify the modulation algorithms to form the output voltage, the balancing algorithm to equalize the sub-module capacitor voltage, and the redundancy operation algorithm to improve the system reliability.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.1
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• pp.65-73
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• 2002

This paper proposes a new carrier-based PWM method to solve the most serious problem of flying capacitor multi-level inverter that is the unbalance of capacitor voltages. The voltage unbalance occurs due to the difference of each capacitor's charging and discharging time applied to Flying Capacitor Inverter. New solution controls the variation of capacitor voltages into the mean '0'during some period by means of new carriers using the leg voltage redundancy in the flying capacitor inverter. The solution can be easily expanded to the multi-level inverter. The leg voltage redundancy in the new method makes the switching loss of device equals to the conduction loss of device. This paper will examine the unbalance of capacitor voltage and the conventional theory of self-balance using Phase-shifted carrier. And then the new method that is suitable to the flying capacitor inverter will be explained.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.4
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• pp.273-279
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• 2000

Electrical repair method which has replaced laser repair method can replace defective cell by redundancy’s in the redundancy scheme of conventional high density memory. This electrical repair circuit consists of the antifuse program/read/latch circuits, a clock generator a negative voltage generator a power-up pulse circuit a special address mux and etc. The measured program voltage of made antifuses was 7.2~7.5V and the resistance of programmed antifuses was below 500 Ω. The period of clock generator was about 30 ns. The output voltage of a negative voltage generator was about 4.3 V and the current capacity was maximum 825 $mutextrm{A}$. An antifuse was programmed using by the electric potential difference between supply-voltage (3.3 V) and output voltage generator. The output pulse width of a power-up pulse circuit was 30 ns ~ 1$mutextrm{s}$ with the variation of power-up time. The programmed antifuse resistance required below 44 ㏀ from the simulation of antifuse program/read/latch circuit. Therefore the electrical repair circuit behaved safely and the yield of high densitymemory will be increased by using the circuit.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.3
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• pp.273-279
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• 2015

A zero vector selection method to reduce switching losses for model predictive control (MPC) of voltage source inverter is proposed. A conventional MPC of voltage source inverter has not been proposed, and a method to select the redundancy of the zero vector is required for this study. In this paper, the redundancy of the zero vectors is selected with generating a zero sequence voltage to reduce switching losses. The zero vector of 2-level inverter is determined by determining sign of the zero sequence voltage. In the proposed method, the quality of the current is retained and switching loss can be reduced compared with the conventional method. This result was verified by P-sim simulation and experiments.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.625-629
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• 2004

This paper presents a systematical approach to study carrier based PWM techniques (CPWM) in diode-clamped and cascade multilevel inverters by using a proposed named multi-modulating pattern method. This method is based on the vector correlation between CPWM and the space vector PWM (SVPWM) and applicable to both multilevel inverter topologies. A CPWM technique can be described in a general mathematical equation, and obtain the same outputs similarly as of the corresponding SVPWM. Control of the fundamental voltage, vector redundancies and phase redundancies in multilevel inverter can be formulated separately in the CPWM equation. The deduced CPWM can obtain the full vector redundancy control, and fully utilize phase redundancy in a cascade inverter In this continued part, it will be deduced correlation between CPWM equations in multi-carrier system and single carrier system, present the mathematical model of voltage source inverter related to the common mode voltage and propose a general algorithm for multi-modulating modulator. The obtained theory will be demonstrated by simulation results.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.8
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• pp.1877-1886
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• 2010

In this paper, we design a redundancy control circuit for 1T-SRAM repair using electrical fuse programming. We propose a dual port eFuse cell to provide high program power to the eFuse and to reduce the read current of the cell by using an external program supply voltage when the supply power is low. The proposed dual port eFuse cell is designed to store its programmed datum into a D-latch automatically in the power-on read mode. The layout area of an address comparison circuit which compares a memory repair address with a memory access address is reduced approximately 19% by using dynamic pseudo NMOS logic instead of CMOS logic. Also, the layout size of the designed redundancy control circuit for 1T-SRAM repair using electrical fuse programming with Dongbu HiTek's $0.11{\mu}m$ mixed signal process is $249.02 {\times}225.04{\mu}m^{2}$.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.6
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• pp.469-477
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• 2003

This paper proposes a Carrier-Rotation (CR) PWM technique that is a new solution for the voltage unbalancing problem of flying capacitors in the Flying Capacitor Multi-level Inverter (FCMI). The proposed technique equalizes the utilization of phase leg voltage redundancies corresponding to the charging and the discharging state of individual flying capacitors during each switching period of all the switches. Therefore, the charging and the discharging quantity of flying capacitors are equal, which makes the average variation of flying capacitor voltages become zero and keeps their voltage stable during minimum specified period. It also has the reduced harmonic contents of output voltage and the same switch utilization since all the carrier signals are in phase and the switching frequency of each switch is identical. The proposed technique is analyzed precisely in flying capacitor 3-level inverter and then it has expanded to the FCMI (N-level, N>3). Experimental results on the laboratory prototype flying capacitor 3-level inverter confirm the validity of the proposed technique.