• Title/Summary/Keyword: voltage gain

Search Result 1,019, Processing Time 0.024 seconds

0.6~2.0 GHz Wideband Active Balun Using Advanced Phase Correction Architecture (진화된 위상보정 구조를 갖는 0.6~2.0 GHz 광대역 Active Balun 설계)

  • Park, Ji An;Jin, Ho Jeong;Cho, Choon Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.25 no.3
    • /
    • pp.289-295
    • /
    • 2014
  • In this paper a wideband active balun using advanced phase correction architecture is proposed. The proposed active balun is constructed with each different architecture of active balun combined with the cascode architecture to improve phase correction performance compared with conventional phase correction techniques. Operating over 0.6~2.0 GHz band, the proposed balun shows $10^{\circ}$ of phase error and 2 dB of gain error with 7 mW power consumption from 1.8 V supply voltage.

Compact Dual-Band Half-Ring-Shaped Bent Slot Antenna for WLAN and WiMAX Applications

  • Yeo, Junho;Lee, Jong-Ig
    • Journal of information and communication convergence engineering
    • /
    • v.15 no.4
    • /
    • pp.199-204
    • /
    • 2017
  • A compact dual-band half-ring-shaped (HRS) bent slot antenna fed by a coplanar waveguide for wireless local area network (WLAN) and worldwide interoperability for microwave access (WiMAX) applications is presented. The antenna consists of two HRS slots with different lengths and widths. The two HRS slots are connected through an arc-shaped slit, and the upper HRS slot is bent in order to reduce the size of the antenna. The optimized dual-band HRS bent slot antenna operating in the 2.45 GHz WLAN and 3.5 GHz WiMAX bands is fabricated on an FR4 substrate with dimensions of 30 mm by 30 mm. The slot length of the proposed dual-band slot antenna is reduced by 35%, compared to a conventional dual-band rectangular slot antenna. Experimental results show that the proposed antenna operates in the frequency bands of 2.40-2.49 GHz and 3.39-3.72 GHz for a voltage standing wave ratio of less than 2, and measured gain is larger than 1.4 dBi in the two bands.

High-Power-Density Power Conversion Systems for HVDC-Connected Offshore Wind Farms

  • Parastar, Amir;Seok, Jul-Ki
    • Journal of Power Electronics
    • /
    • v.13 no.5
    • /
    • pp.737-745
    • /
    • 2013
  • Offshore wind farms are rapidly growing owing to their comparatively more stable wind conditions than onshore and land-based wind farms. The power capacity of offshore wind turbines has been increased to 5MW in order to capture a larger amount of wind energy, which results in an increase of each component's size. Furthermore, the weight of the marine turbine components installed in the nacelle directly influences the total mechanical design, as well as the operation and maintenance (O&M) costs. A reduction in the weight of the nacelle allows for cost-effective tower and foundation structures. On the other hand, longer transmission distances from an offshore wind turbine to the load leads to higher energy losses. In this regard, DC transmission is more useful than AC transmission in terms of efficiency because no reactive power is generated/consumed by DC transmission cables. This paper describes some of the challenges and difficulties faced in designing high-power-density power conversion systems (HPDPCSs) for offshore wind turbines. A new approach for high gain/high voltage systems is introduced using transformerless power conversion technologies. Finally, the proposed converter is evaluated in terms of step-up conversion ratio, device number, modulation, and costs.

A Monolithic Integration with A High Density Circular-Shape SOI Microsensor and CMOS Microcontroller IC (CMOS Microcontroller IC와 고밀도 원형모양SOI 마이크로센서의 단일집적)

  • Mike, Myung-Ok;Moon, Yang-Ho
    • Journal of IKEEE
    • /
    • v.1 no.1 s.1
    • /
    • pp.1-10
    • /
    • 1997
  • It is well-known that rectangular bulk-Si sensors prepared by etch or epi etch-stop micromachining technology are already in practical use today, but the conventional bulk-Si sensor shows some drawbacks such as large chip size and limited applications as silicon sensor device is to be miniaturized. We consider a circular-shape SOI(Silicon-On-Insulator) micro-cavity technology to facilitate multiple sensors on very small chip, to make device easier to package than conventional sensor like pressure sensor and to provide very high over-pressure capability. This paper demonstrates the cross-functional results for stress analyses(targeting $5{\mu}m$ deflection and 100MPa stress as maximum at various applicable pressure ranges), for finding permissible diaphragm dimension by output sensitivity, and piezoresistive sensor theory from two-type SOI structures where the double SOI structure shows the most feasible deflection and small stress at various ambient pressures. Those results can be compared with the ones of circular-shape bulk-Si based sensor$^{[17]}. The SOI micro-cavity formed the sensors is promising to integrate with calibration, gain stage and controller unit plus high current/high voltage CMOS drivers onto monolithic chip.

  • PDF

A 3.3V, 68% power added efficieny, GaAs power MESFET for mobile digital hand-held phone (3.3V 동작 68% 효율, 디지털 휴대전화기용 고효율 GaAs MESFET 전력소자 특성)

  • 이종남;김해천;문재경;이재진;박형무
    • Journal of the Korean Institute of Telematics and Electronics A
    • /
    • v.32A no.6
    • /
    • pp.41-50
    • /
    • 1995
  • A state-of-the-arts GaAs power metal semiconductor field effect transistor (MESFET) for 3.3V operation digital hand-held phone at 900 MHz has been developed for the first time, The FET was fabricated using a low-high doped structures grown by molecular beam epitaxy (MBE). The fabricated MESFETs with a gate width of 16 mm and a gate length of 0.8 .mu.m shows a saturated drain current (Idss) of 4.2A and a transconductance (Gm) of around 1700mS at a gate bias of -2.1V, corresponding to 10% Idss. The gate-to-drain breakdown voltage is measured to be 28 V. The rf characteristics of the MESFET tested at a drain bias of 3.3 V and a frequencyof 900 MHz are the output power of 32.3 dBm, the power added efficiency of 68%, and the third-ordr intercept point of 49.5 dBm. The power MESFET developed in this work is expected to be useful as a power amplifying device for digital hand-held phone because the high linear gain can deliver a high power added efficiency in the linear operation region of output power and the high third-order intercept point can reduce the third-order inter modulation.

  • PDF

A Novel CMOS Rail-to-Rail Input Stage Circuit with Improved Transconductance (트랜스컨덕턴스 특성을 개선한 새로운 CMOS Rail-to-Rail 입력단 회로)

  • 권오준;곽계달
    • Journal of the Korean Institute of Telematics and Electronics C
    • /
    • v.35C no.12
    • /
    • pp.59-65
    • /
    • 1998
  • In this paper, a novel rail-to-rail input stage circuit with improved transconductance Is designed. Its excellent performances over whole common-mode input voltage Vcm range is demonstrated by circuit simulator HSPICE. The novel input stage circuit comprises additional 4 input transistors and 4 current sources/sinks. It maintains DC currents of signal amplifying transistors when one of the differential input stage circuits operates, but it reduces these currents to 1/4 when both differential input stage circuits operates, As a result, a operational amplifier with the novel circuit maintains nearly constant transconductance performance and unity-gain frequency in strong inversion region. The novel circuit allows an optimal frequency compensation and uniform operational amplifier performance over whole Vcm range.

  • PDF

Design of VGA for MB-OFDM UWB (CMOS 0.18 μm 공정을 이용한 MB-OFDM UWB용 VGA 설계)

  • Lee Seung-Sik;Park Bong-Hyuk;Kim Jae-Young;Choi Sang-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.16 no.2 s.93
    • /
    • pp.144-148
    • /
    • 2005
  • In this paper, we have proposed VGA fur MB-OFDM UWB application using $CMOS\;0.18\;{\mu}m$ technique. The proposed VGA can vary power gain from 45 dB to -6 dB and 3 dB band width is more than 264 MHz. It has 3-stage cascade structure and DC offset cancellation. It consumes less, than 4 mA for 1.8 V bias voltage.

Design of a New Harmonic Noise Frequency Filtering Down-Converter in InGaP/GaAs HBT Process

  • Wang, Cong;Yoon, Jae-Ho;Kim, Nam-Young
    • Journal of electromagnetic engineering and science
    • /
    • v.9 no.2
    • /
    • pp.98-104
    • /
    • 2009
  • An InGaP/GaAs MMIC LC VCO designed with Harmonic Noise Frequency Filtering(HNFF) technique is presented. In this VCO, internal inductance is found to lower the phase noise, based on an analytic understanding of phase noise. This VCO directly drives the on-chip double balanced mixer to convert RF carrier to IF frequency through local oscillator. Furthermore, final power performance is improved by output amplifier. This paper presents the design for a 1.721 GHz enhanced LC VCO, high power double balance mixer, and output amplifier that have been designed to optimize low phase noise and high output power. The presented asymmetric inductance tank(AIT) VCO exhibited a phase noise of -133.96 dBc/Hz at 1 MHz offset and a tuning range from 1.46 GHz to 1.721 GHz. In measurement, on-chip down-converter shows a third-order input intercept point(IIP3) of 12.55 dBm, a third-order output intercept point(OIP3) of 21.45 dBm, an RF return loss of -31 dB, and an IF return loss of -26 dB. The RF-IF isolation is -57 dB. Also, a conversion gain is 8.9 dB through output amplifier. The total on-chip down-converter is implanted in 2.56${\times}$1.07 mm$^2$ of chip area.

The Effect of Fluid Flow on the Primary Particle of Al-7wt%Si Alloy in Electromagnetic Stirring (전자교반시 Al-7wt%Si합금의 초정입자에 미치는 유동의 영향)

  • Lim, Sung-Chul;Yoon, Eui-Pak
    • Journal of Korea Foundry Society
    • /
    • v.16 no.6
    • /
    • pp.565-575
    • /
    • 1996
  • In this study, to gain the semi-solid alloy we employed the electromagnetic rotation by a induction motor of 3-phases and 2-poles for Al-7wt%Si alloy and observed the size of primary solid particle, distribution state of primary solid particle, the degree of sphericity, and fraction of primary solid for the evaluation of its results. The size of primary solid particle increases from $98{\mu}m$ to $118{\mu}m$ as solid fraction increases from 0.2 to 0.5. The degree of sphericity increased as the solid fraction increased. Solid particles obtained from the microstructures of isothermally held sample were coarsened and the degree of sphericity was enhanced as isothermal holding time increased. However, when the sample was stirred for more than 40min, solid particles merged together and liquid phase was entrapped within the cluster of solid particles. The size of primary solid particle was not changed significantly with the variation of input voltages by 160V over which solid particles began to merge together to be a large cluster of about $170{\mu}m$ at 180V. The standard deviation and the degree of sphericity were not changed significantly with the variation of input voltage.

  • PDF

UWB WBAN Receiver for Real Time Location System (위치 인식이 가능한 WBAN 용 UWB 수신기)

  • Ha, Jong Ok;Park, Myung Chul;Jung, Seung Hwan;Eo, Yun Seong
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.50 no.10
    • /
    • pp.98-104
    • /
    • 2013
  • This paper presents a WBAN UWB receiver circuit for RTLS(real time location system) and wireless data communication. The UWB receiver is designed to OOK modulation for energy detection. The UWB receiver is designed for sub-sampling techniques using 4bit ADC and DLL.The proposed UWB receiver is designed in $0.18{\mu}m$ CMOS and consumes 61mA with a 1.8V supply voltage. The UWB receiver achieves a sensitivity of -85.7 dBm, a RF front-end gain of 42.1 dB, a noise figure of 3.88 dB and maximum sensing range of 4 meter.