• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.7
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• pp.2914-2935
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• 2016

With the increasing popularization of cloud computing, how to reduce physical energy consumption and increase resource utilization while maintaining system performance has become a research hotspot of virtual machine deployment in cloud platform. Although some related researches have been reported to solve this problem, most of them used the traditional heuristic algorithm based on greedy algorithm and only considered effect of single-dimensional resource (CPU or Memory) on energy consumption. With considerations to multi-dimensional resource utilization, this paper analyzed impact of multi-dimensional resources on energy consumption of cloud computation. A multi-dimensional resource constraint that could maintain normal system operation was proposed. Later, a novel virtual machine deployment method (NVMDM) based on improved particle swarm optimization (IPSO) and Euclidean distance was put forward. It deals with problems like how to generate the initial particle swarm through the improved first-fit algorithm based on resource constraint (IFFABRC), how to define measure standard of credibility of individual and global optimal solutions of particles by combining with Bayesian transform, and how to define fitness function of particle swarm according to the multi-dimensional resource constraint relationship. The proposed NVMDM was proved superior to existing heuristic algorithm in developing performances of physical machines. It could improve utilization of CPU, memory, disk and bandwidth effectively and control task execution time of users within the range of resource constraint.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.1
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• pp.7-14
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• 2017

Due to the recent advances in Phage-Change Memory (PCM) technologies, a new memory hierarchy of computer systems with PCM is expected to appear. In this paper, we present a new page replacement policy that adopts PCM as a high speed swap device. As PCM has limited write endurance, our goal is to minimize the amount of data written to PCM. To do so, we defer the eviction of dirty pages in proportion to their dirtiness. However, excessive preservation of dirty pages in memory may deteriorate the page fault rate, especially when the memory capacity is not enough to accommodate full working-set pages. Thus, our policy monitors the current working-set size of the system, and controls the deferring level of dirty pages not to degrade the system performances. Simulation experiments show that the proposed policy reduces the write traffic to PCM by 160% without performance degradations.

• Proceedings of the KIEE Conference
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• 1998.11b
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• pp.672-674
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• 1998

Java virtual machine has the garbage collector that automate memory management. Mark-compact algorithm is one of the garbage collection algorithm that operating in 2 phases, marking and sweeping. One is Marking is marking live objects reachable from root object set. Sweeping is sweeping unmarked object from memory(return to free memory pool). This algorithm is easy to implement but cause a memory fragmentation. So compacting memory, before memory defragmentation become serious. When compacting memory, all other processes are suspended. It is critical for embedded system that must guarantee real-time processing. This paper introduce enhanced mark-compact garbage collection algorithm. Grouping the objects by their size that minimize memory fragmentation. Then apply smart algorithm to the grouped objects when allocating objects and compacting memory.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.27 no.4
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• pp.775-783
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• 2017

As interest in cloud computing grows, the number of users using cloud computing services is increasing. However, cloud computing technology has been steadily challenged by security concerns. Therefore, various security breaches are springing up to enhance the system security for cloud services users. In particular, research on detection of malicious VM (Virtual Machine) is actively underway through the introspecting virtual machines on the cloud platform. However, memory analysis technology is not used as a monitoring tool in the environments where multiple virtual machines are run on a single server platform due to obstructive monitoring overhead. As a remedy to the challenging issue, we proposes a computationally efficient instance memory introspection scheme to minimize the overhead that occurs in memory dump and monitor it through a partial memory monitoring based on the well-defined kernel memory map library.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.5
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• pp.476-484
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• 2015

Due to the recent advances in non-volatile memory technologies such as PCM, a new memory hierarchy of computer systems is expected to appear. In this paper, we explore the performance of PCM-based swap systems and discuss how this system can be managed efficiently. Specifically, we introduce three management techniques. First, we show that the page fault handling time can be reduced by attaching PCM on DIMM slots, thereby eliminating the software stack overhead of block I/O and the context switch time. Second, we show that it is effective to reduce the page size and turn off the read-ahead option under the PCM swap system where the page fault handling time is sufficiently small. Third, we show that the performance is not degraded even with a small DRAM memory under a PCM swap device; this leads to the reduction of DRAM's energy consumption significantly compared to HDD-based swap systems. We expect that the result of this paper will lead to the transition of the legacy swap system structure of "large memory - slow swap" to a new paradigm of "small memory - fast swap."

• Journal of Internet Computing and Services
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• v.17 no.6
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• pp.93-101
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• 2016

As the Android smart phones become more popular, applications that handle users' personal data such as IDs or passwords and those that handle data directly related to companies' income such as in-game items are also increasing. Despite the need for such information to be protected, it can be modified by malicious users or leaked by attackers on the Android. The reason that this happens is because debugging functions of the Linux, base of the Android, are abused. If an application uses debugging functions, it can access the virtual memory of other applications. To prevent such abuse, access controls should be reinforced. However, these functions have been incorporated into Android O.S from its Linux base in unmodified form. In this paper, based on an analysis of both existing memory access functions and the Android environment, we proposes a function that verifies thread group ID and then protects against illegal use to reinforce access control. We conducted experiments to verify that the proposed method effectively reinforces access control. To do that, we made a simple application and modified data of the experimental application by using well-established memory editing applications. Under the existing Android environment, the memory editor applications could modify our application's data, but, after incorporating our changes on the same Android Operating System, it could not.

• Journal of Multimedia Information System
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• v.6 no.1
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• pp.7-14
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• 2019

This work presents a virtual prototyping design approach for an area-based image stitching hardware. The virtual hardware obtained from virtual prototyping is equivalent to the conceptual algorithm, yet the conceptual blocks are linked to the actual circuit components including the memory, logic gates, and arithmetic units. Through the proposed method, the overall structure, size, and computation speed of the actual hardware can be estimated in the early design stage. As a result, the optimized virtual hardware facilitates the hardware implementation by eliminating trail design and redundant simulation steps to optimize the hardware performance. In order to verify the feasibility of the proposed method, the virtual hardware of an image stitching platform has been realized, where it required 10,522,368 clock cycles to stitch two $1280{\times}1024$ sized images. Furthermore, with a clock frequency of 250MHz, the estimated computation time of the proposed virtual hardware is 0.877sec, which is 10x faster than the software-based image stitch platform using MATLAB.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.22 no.3
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• pp.93-98
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• 2022

Recently, fast storage media such as Optane have emerged, and memory system configurations designed for disk storage should be reconsidered. In this paper, we analyze the effect of the page size on the memory system performances when fast storage is adopted. Based on this, we design a page size model that can guide an appropriate page size for given workloads in virtualized environments. Configuring different page sizes for various workloads is not an easy matter in traditional systems, but due to the widespread adoption of cloud systems, page sizing performed in our model is feasible for virtual machines, which are generated for executing specific workloads. Simulation experiments under various virtual machine scenarios show that the proposed model improves the memory access time significantly by configuring page sizes for given workloads.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.1003-1006
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• 2005

Vertex shader of GPU in personal computer is advanced in functions as to be half of traditional fixed T&L functions. And, capacity of memory for saving resources to process instructions is unlimited. GPU that can be programmed by programmer is needed for mobile system as well as personal computer. In this paper, we implement software virtual machine for vertex shader using C++ Language. Our goal is designing hardware GPU that can apply to mobile system. The virtual machine consists of nVidia GPU instructions. Input Data to virtual machine is generated by Microsoft fxc compiler. That is to say, Input Data is compiled shader program written in HLSL, Cg, or ASM. The virtual machine will be a reference model for designing hardware GPU and can be used for Testbed to test added or modified instruction.

• Proceedings of the Korean Information Science Society Conference
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• 2001.04a
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• pp.115-117
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• 2001

대부분의 embedded system에서 hard-disk 대용으로 flash memory를 사용하고 있으며, flash device에 압축 커널이미지와 root file system image를 가지고 있다. Booting 고정 중 커널의 압축이 풀리고 메모리에 로드되어 제어를 넘겨받으면 flash memory 상에 존재하는 root file system image를 ramdisk의 image로 로드하여 시스템은 결국 ramdisk에 root file system을 가지게 된다. Ramdisk 상의 프로그램을 실행하기 위해 메모리로 실행파일 이미지를 copy하는 과정을 피하고 ramdisk 상의 이미지를 바로 프로세스의 virtual memory area에 직접 매핑 시켜 주는 XIP(eXection-In-Place)를 구현함으로써 많은 메모리 절감 효과를 얻을 수 있다. 본 연구에서는 ramdisk를 root file system으로 사용하는 embedded system에서의 XIP 구조를 설계하고 구현하였다.