• The Transactions of the Korea Information Processing Society
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• v.3 no.7
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• pp.1868-1879
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• 1996

There are limitations to process high bandwidth traffic in B-ISDN with mesh- topology single bus architecture of current mobile communication system. And, it is impossible to import ATM switch using fixed length packet rather than variable length packet. Some implementations are able to process variable length packet, but there are some problems such as pre-processing for synchronization and bit delay. In this paper, we design a concentrator that can manipulate variable length packet without additional pre-process. There is on bit delay for packet starting signal in input interface, So it is more efficient to process packets, such that the concentrator can reduce he processing time as $\ulcornerlog2N\lrcorne＋1$ bit-time rather than N bit-time delay in ordinary concentrator. It is expected that the mobile communication system with partial mesh topology bus adopting the knockout switch architecture can process high bandwidth traffic in B-ISDN.

• Journal of KIISE:Computing Practices and Letters
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• v.14 no.3
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• pp.311-315
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• 2008

The switching fabric used to make high speed switching for packet transfer between input and output interface in recent internet environments. Without making any changes in order to remain ATM switching fabric, the existing structures should split/reassemble a packet to certain size, set aside cross-point buffer and will put loads on the system. In this paper, we proposed a new switch architecture, which has separated data memory plane and switching plane packet data will be stored on the separate memory structure and simultaneously only the part of the memory address pointers can pass the switching fabric. The small mini packets which have address pointer and basic information would be passed through the switching fabric. It is possible to achieve the remarkable switching performance than other switch fabrics with contending variable length packets.

• Journal of Internet Computing and Services
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• v.8 no.5
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• pp.161-170
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• 2007

The proposed switch which has separated data plane and switching plane can make parallel processing for packet data storing, memory address pointer switching and simultaneously can be capable of switching the variable length for IP packets. The proposed architecture does not require the complicated arbitration algorithms in VOQ, also is designed for QoS of generic output queue switch as well as input queue. At the result of simulations, the proposed architecture has less average packet delay than the one of the memory-sharing based architecture and guarantees keeping a certain average packet delay in increasing switch size.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.37 no.9
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• pp.24-29
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• 2000

As a result of the continuing increase in the high capacity and high speed requirement, ATM will be important technology. But previous AAL type cant support service that is variable length, low speed. So AAL2 is the most recently standardized AAL type, which is aimed at providing for the bandwidth efficient transmission of low-rate, short, and variable length packets in delay-sensitive applications. In this paper, we propose the architecture and the behavior of scalable AAL2 switch that are far different from ATM switch. Also, the performance of the designed switch is analyzed by computer simulation.

• Journal of Internet Computing and Services
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• v.10 no.2
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• pp.171-177
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• 2009

Optical packet switching(OPS) is a strong candidate for the next-generation internet, since it has a fine switching granularity at the packet level for providing flexible bandwidth, and provides seamless integration between WDM layer and IP layer. Optical packet switching have been studied in two categories: OPS in synchronous and OPS in asynchronous networks. In this article we are focused on contention resolution of OPS in asynchronous networks. The hybrid buffer have been addressed, to reduce packet loss further as one of the alternative buffer structures for contention resolution of asynchronous and variable length packets, which consists of the FDL buffer and the electronic buffer. The OPS design issue for the limited number of TWCs and internal wavelengths is important in the aspect of switch cost and resource efficiency. Therefore, an hybrid buffer structured optical packet switch and its scheduling algorithm is presented for considering the limited number of TWCs and internal wavelengths, for contention resolution of asynchronous and variable length packets. The proposed algorithm could lead to the packet loss improvement compared to the legacy LAUC-VF algorithm with only the FDL buffer.

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.159-162
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• 2001

AAL2 is an adaptation layer that is supposed to support delay-sensitive applications with low bit-rate, short, variable packet length in a bandwidth-efficient way. For the switching of AAL2 service channels, AAL2 network is needed, which consists of AAL2 switching nodes. In this paper, The architecture of the unit AAL2 switch is proposed and the performance is analyzed in the CDMA environment.

• Journal of Internet Computing and Services
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• v.7 no.6
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• pp.113-121
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• 2006

To reduce switch cost, the optimum numbers of tunable wavelength converters (TWCs) and internal wavelengths required for contention resolution of asynchronous and variable length packets like internet traffics, is presented in the optical packet switch (OPS) with the shared fiber delay line (FDL) buffer. To optimize TWCs and internal wavelength related to on OPS design cost, we proposed a scheduling algorithm for the limited TWCs and internal wavelengths. For three TWC alternatives (not shared, partially shared, and fully shared cases), the optimum numbers of TWCs and internal wavelengths to guarantee minimum pocket loss are evaluated to prevent resource waste. Under o given load, TWCs and internal wavelengths could be significantly reduced, guaranteeing the same pocket loss probability as the performance of on OPS with full TWCs and internal wavelengths.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.3 s.357
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• pp.41-50
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• 2007

In this paper, a new Dual Round-Robin (DRR) based iterative SLIP (iSLIP) scheduling scheme, called DiSLIP is proposed for IP switching systems. By using DRR followed by iSLIP, DiSLIP can exploit desynchronization effect of DRR and high performance of iSLIP, while the drawbacks of two schemes are minimized. 'Through computer simulation, we verify the switch throughput and total waiting time of the proposed scheme under nonuniform and correlated self-similar traffic. Moreover, the proposed scheme can considerably reduce the complexity of parallel matching logics compared to iSLIP. From the result, we observe that the proposed scheme outperforms DRR on throughput as well as iSLIP schemes on complextiy.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.9
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• pp.2027-2034
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• 1997

Frame relay is a fast packet switching technology that performs relaying and multiplexing frames with variable lengths over a wide area link at the T1 or E1 speed, by elminating error and flow control in the network. In frame relay networks, congestion control is typically performed through the rate enforcement with a discard eligibility (DE) bit, and the explicit negative feedback meachanisms using explicit congetion notification bits. In this paper, we consider the congestiong control scheme using the rate enforcement mechanism with DE bit for frame relay network. Assuming that each frame with exponentially distributed length arrives according to the Poission fashion, we can treat the frame relay switch as an M/M/1/K priority queueing system with pushout basis. We analyze and present the blocking probabilities and waiting time distributions of frames.