• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.113-114
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• 2006

In this paper, dual-gate mixer has been designed and optimized to have variable conversion gain for WiBro and WLAN applications and to save power. With the LO power of 0dBm and RF power of -50dBm, the mixer shows 15dB conversion gain. When RF power increases from -50dBm to -20dBm, the conversion gain decreases to -2dB with bias change. The variable conversion gain can reduce the high dynamic range requirement of AGC burden at IF stage. Also, it can save the dc power dissipation of mixer up to 90%.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.10
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• pp.1104-1111
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• 2003

The paper presents an algorithm for the compensation of gain and phase imbalances to exist between I-phase and Q-phase signal at direct conversion receiver. We propose a gain and phase imbalances blind equalization compensation algorithm by using variable step-size adaptive loop at direct conversion receiver. The blind equalization schemes have trade-off between convergence speed and jitter effect for the compensation of gain and phase imbalance. We propose the variable step-size adaptive loop method, which varies the loop coefficients according to errors, for recovering these problem. By using variable step-size adaptive loops, we propose to speed up the convergence process and reduce the jitter effect and simulation results show that the algorithm compensates signal loss and speeds up convergence time.

• Journal of Advanced Navigation Technology
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• v.10 no.2
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• pp.138-144
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• 2006

In this paper, dual mode FET mixer for WiBro and wireless LAN(WLAN) applications has been designed in the form of dual gate FET mixer by using the cascode structure of two single gate pHEMTs. The designed dual gate mixer has been optimized to have variable conversion gain for WiBro and WLAN applications in order to save dc power consumption. The LO to RF isolation of the designed mixer is more than 20dB from 2.3GHz to 2.5GHz band. With the LO power of 0dBm and RF power of -50dBm, the mixer shows 15dB conversion gain. When RF power increases from -50dBm to -20dBm, the conversion gain decreases to -2dB from 15dB with bias change. The variable conversion gain has several advantages. It can reduce the high dynamic range requirement of AGC burden at IF stage. Also, it can save the dc power dissipation of mixer up to 90%.

• Journal of IKEEE
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• v.22 no.2
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• pp.408-412
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• 2018

In this paper, a 26GHz variable gain amplifier fabricated using a 40nm CMOS process is studied. In the case of an automobile radar using 79 GHz, it is advantageous in designing and driving to drive down to a low frequency band or to use a low frequency band before up conversion rather than designing and matching the entire circuit to 79 GHz in terms of frequency characteristics. In the case of a Phased Array System that uses time delay through TTD (True Time Delay) in practice, down conversion to a lower frequency is advantageous in realizing a real time delay and reducing errors. For a VGA (Variable Gain Amplifier) operating in the 26GHz frequency band that is 1/3 of the frequency of 79GHz, VDD : 1V, Bias 0.95V, S11 is designed to be <-9.8dB (Mea. High gain mode) and S22 < (Mea. high gain mode), Gain: 2.69dB (Mea. high gain mode), and P1dB: -15 dBm (Mea. high gain mode). In low gain mode, S11 is <-3.3dB (Mea. Low gain mode), S22 <-8.6dB (Mea. low gain mode), Gain: 0dB (Mea. low gain mode), P1dB: -21dBm (Mea. Low gain mode).

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.11
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• pp.101-106
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• 2014

This paper presents a wide dynamic range radio-frequency (RF) root-mean-square (RMS) power detector using an automatic gain control (AGC) loop. The AGC loop consists of a variable gain amplifier (VGA), RMS conversion block and gain control block. The VGA exploits dB-linear gain characteristic of the cascade VGA. The proposed circuit utilizes full-wave squaring and generates a DC voltage proportional to the RMS of an input RF signal. The proposed RMS power detector operates from 500MHz to 5GHz. The detecting input signal range is from 0 dBm to -70 dBm or more with a conversion gain of -4.53 mV/dBm. The proposed RMS power detector is designed in a 65-nm 1.2-V CMOS process, and dissipates a power of 5 mW. The total active area is $0.0097mm^2$.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.8
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• pp.1464-1469
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• 2008

A CMOS Gm-C filter with variable cutoff frequency applicable for using in the direct conversion receiver is designed. The designed filter comprises the CMOS differential transconductors, and the gm of the transconductor is controlled by the bias voltage. This configuration can compensate variant of the cutoff frequency which could be generated by external noises, and also be used in multiband receiver. As a results of HSPICE simulation, the control range of the cutoff frequency is $1.5MHz{\sim}3.5MHz$ and the gain control range is $-2.8dB{\sim}2.6dB$. The layout of the designed 5th-order Elliptic low-pass filter is performed to fabricate a chip using $2.5V-0.25{\mu}m$ CMOS processing parameter.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.12
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• pp.91-96
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• 2011

In this paper, a low-power direct-conversion transmitter based on current-mode operation, which satisfies the IEEE 802.15.4 standard, is proposed and implemented in a $0.13{\mu}m$ CMOS technology. The proposed transmitter consists of DACs, LPFs, variable gain I/Q up-conversion mixer, a divide-by-two circuit with LO buffer, and a drive amplifier. By combining DAC, LPF, and variable gain I/Q up-conversion mixer with a simple current mirror configuration, the transmitter's power consumption is reduced and its linearity is improved. The drive amplifier is a cascode amplifier with gain controls and the 2.4GHz I/Q differential LO signals are generated by a divide-by-two current-mode-logic (CML) circuit with an external 4.8GHz input signal. The implemented transmitter has 30dB of gain control range, 0dBm of maximum transmit output power, 33dBc of local oscillator leakage, and 40dBc of the transmit third harmonic component. The transmitter dissipates 10.2mW from a 1.2V supply and the die area of the transmitter is $1.76mm{\times}1.26mm$.

• Journal of Power Electronics
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• v.13 no.6
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• pp.1024-1031
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• 2013

This paper addresses linear quadratic regulation (LQR) for variable speed variable pitch wind turbines. Because of the inherent nonlinearity of wind turbines, a set of operating conditions is identified and then a LQR controller is designed for each of the operating points. The feedback controller gains are then interpolated linearly to get a control law for the entire operating region. In addition, the aerodynamic torque and effective wind speed are estimated online to get the gain-scheduling variable for implementing the controller. The potential of this method is verified through simulation with the help of MATLAB/Simulink and GH Bladed. The performance and mechanical load when using LQR are also compared with those obtained when using a PI controller.

• Journal of the Optical Society of Korea
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• v.18 no.6
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• pp.657-662
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• 2014

We demonstrate a simulation of a parallel hybrid fiber amplifier in the C+L-band with a gain controlling technique. A variable optical coupler is used to control the input signal power for both EDFA and RFA branches. The gain spectra of the C+L-band are flattened by optimizing the coupling ratio of the input signal power. In order to enhance the pump conversion efficiency, the EDFA branch was pumped by the residual Raman pump power. A gain bandwidth of 60 nm from 1530 nm to 1590 nm is obtained with large input signal power less than -5 dBm. The gain variation is about 1.06 dB at a small input signal power of -30 dBm, and it is reduced to 0.77 dB at the large input signal power of -5 dBm. The experimental results show close agreement with the simulation results.

• Asian-Australasian Journal of Animal Sciences
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• v.7 no.3
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• pp.441-448
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• 1994

Postweaning performance data were obtained on 187 group fed purebred Angus calves from 12 selected sires (six high and six low feed conversion sires) in 1985 and 1986. The objective of this portion of the study was to develop prediction equations for feed conversion from a stepwise regression analysis. Variables measured were on-test weight (ONTSTWT), on-test age (ONTSTAG), five weights by 28-d periods, seven linear body measurements: heart girth (HG), hip height (HH), head width (HDW), head length (HDL), muzzle circumference (MC), length between hooks and pins (HOPIN) and length between shoulder and hooks (SHHO), and backfat thickness (BF). Stepwise regressions for maintenance adjusted feed conversion (ADJFC) and unadjusted feed conversion (UNADFC) over the first 140 d of the test, and total feed conversion (FC) until progeny reached 8.89 mm of back fat were obtained separately by conversion groups and sexes and for combined feed conversion groups and sexes. In general, weights were more important than linear body measurements in prediction of feed utilization. To some extent this was expected as weight is related directly to gain which is a component of feed conversion. Weight at 112 d was the most important variable in prediction of feed conversion when data from both feed conversion groups and sexes were combined. Weights at 84 and 140 d were important variables in prediction of UNADFC and FC, respectively, of bulls. ONTSTWT and weight at 140 d had the highest standardized partial regression coefficients for UNADFC and ADJFC, respectively, of heifers. Results indicated that linear measurements, such as MC, HDL and HOPIN, are useful in prediction of feed conversion when feed in takes are unavailable.