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http://dx.doi.org/10.5573/ieie.2014.51.11.101

A CMOS RF Power Detector Using an AGC Loop  

Lee, Dongyeol (Department of Electronic and Electrical Engineering, Hongik University)
Kim, Jongsun (Department of Electronic and Electrical Engineering, Hongik University)
Publication Information
Journal of the Institute of Electronics and Information Engineers / v.51, no.11, 2014 , pp. 101-106 More about this Journal
Abstract
This paper presents a wide dynamic range radio-frequency (RF) root-mean-square (RMS) power detector using an automatic gain control (AGC) loop. The AGC loop consists of a variable gain amplifier (VGA), RMS conversion block and gain control block. The VGA exploits dB-linear gain characteristic of the cascade VGA. The proposed circuit utilizes full-wave squaring and generates a DC voltage proportional to the RMS of an input RF signal. The proposed RMS power detector operates from 500MHz to 5GHz. The detecting input signal range is from 0 dBm to -70 dBm or more with a conversion gain of -4.53 mV/dBm. The proposed RMS power detector is designed in a 65-nm 1.2-V CMOS process, and dissipates a power of 5 mW. The total active area is $0.0097mm^2$.
Keywords
RMS power detector; automatic gain control(AGC); variable gain amplifier(VGA); RF power detector;
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