• Journal of IKEEE
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• v.6 no.2 s.11
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• pp.111-118
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• 2002

In this paper, we present a variable block method to reduce additive computational requirements in determining step-size of variable step-size LMS (VS-LMS) algorithms. The block length is inversely proportional to the changing of step-size in VS-LMS algorithm. The technique reduces computational requirements of the conventional VS-LMS algorithms without a degradation of performance in convergence rate and steady state error. And a method for deriving initial step-size, when the input is zero mean, white Gaussian sequence, is proposed. For demonstrating the good performances of the proposed method, simulation results are compared with the conventional variable step-size algorithms in convergence speed and computational requirements.

• Structural Engineering and Mechanics
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• v.32 no.4
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• pp.501-516
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• 2009

This paper aims to study the large deflections of variable-arc-length elastica subjected to the terminal forces (e.g., axial force and torque). Based on Kirchhoff's rod theory and with help of Euler parameters, the set of nonlinear governing differential equations which free from the effect of singularity are established together with boundary conditions. The system of nonlinear differential equations is solved by using the shooting method with high accuracy integrator, seventh-eighth order Runge-Kutta with adaptive step-size scheme. The error norm of end conditions is minimized within the prescribed tolerance ($10^{-5}$). The behavior of VAL elastica is studied by two processes. One is obtained by applying slackening first. After that keeping the slackening as a constant and then the twist angle is varied in subsequent order. The other process is performed by reversing the sequence of loading in the first process. The results are interpreted by observing the load-deflection diagram and the stability properties are predicted via fold rule. From the results, there are many interesting aspects such as snap-through phenomenon, secondary bifurcation point, loop formation, equilibrium configurations and effect of variable-arc-length to behavior of elastica.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.5
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• pp.683-689
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• 2014

The paper introduces dynamic generation technique of foot trajectories for humanoid robots using CPG(Central Pattern Generator) and proposes adaptive walking method for slope terrains combining a feedback network. The proposed CPG based technique generates the trajectory of foot in the Cartesian coordinates system and it can change the step length adaptively according to the feedback information. To cope with variable slope terrains, the sensory feedback network in the CPG are designed using the geometry relationship between foot position and body center position such that humanoid robot can maintain its stability. To demonstrate the effectiveness of the proposed approach, the experiments on humanoid robot Nao are executed in the Webot simulation. The performance and motion features of the CPG based approach are compared and analyzed focusing on the adaptability in slope terrains.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.4 s.316
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• pp.51-59
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• 2007

In this paper, we propose an efficient hardware architecture for H.264/AVC CAVLC (Context-based Adaptive Variable Length Coding) decoding which used for baseline profile and extended profile. Previous CAVLC architectures are consisted of five step block and each block gets effective bits from Controller block and Accumulator. If large number of non-zero coefficients exist, process for getting effective bits has to iterates many times. In order to reduce this unnecessary process, we propose two techniques, which combine five steps into four steps and reduce process to get efficiency bit by skipping addition step. By adopting these two techniques, the required processing time was reduced about 26% compared with previous architectures. It was designed in a hardware description language and total logic gate count was 16.83k using 0.18um standard cell library.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.3
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• pp.187-187
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• 2004

In this paper, we present an efficient architecture of a versatile Reed-Solomon (RS) decoder which can be programmed to decode RS codes continuously with my message length k as well as any block length n. This unique feature eliminates the need of inserting zeros for decoding shortened RS codes. Also, the values of the parameters n and k, hence the error-correcting capability t can be altered at every codeword block. The decoder permits 3-step pipelined processing based on the modified Euclid's algorithm (MEA). Since each step can be driven by a separate clock, the decoder can operate just as 2-step pipeline processing by employing the faster clock in step 2 and/or step 3. Also, the decoder can be used even in the case that the input clock is different from the output clock. Each step is designed to have a structure suitable for decoding RS codes with varying block length. A new architecture for the MEA is designed for variable values of the t. The operating length of the shift registers in the MEA block is shortened by one, and it can be varied according to the different values of the t. To maintain the throughput rate with less circuitry, the MEA block uses both the recursive technique and the over-clocking technique. The decoder can decodes codeword received not only in a burst mode, but also in a continuous mode. It can be used in a wide range of applications because of its versatility. The adaptive RS decoder over GF($2^8$) having the error-correcting capability of upto 10 has been designed in VHDL, and successfully synthesized in an FPGA chip.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.3
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• pp.29-38
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• 2004

In this paper, we present an efficient architecture of a versatile Reed-Solomon (RS) decoder which can be programmed to decode RS codes continuously with my message length k as well as any block length n. This unique feature eliminates the need of inserting zeros for decoding shortened RS codes. Also, the values of the parameters n and k, hence the error-correcting capability t can be altered at every codeword block. The decoder permits 3-step pipelined processing based on the modified Euclid's algorithm (MEA). Since each step can be driven by a separate clock, the decoder can operate just as 2-step pipeline processing by employing the faster clock in step 2 and/or step 3. Also, the decoder can be used even in the case that the input clock is different from the output clock. Each step is designed to have a structure suitable for decoding RS codes with varying block length. A new architecture for the MEA is designed for variable values of the t. The operating length of the shift registers in the MEA block is shortened by one, and it can be varied according to the different values of the t. To maintain the throughput rate with less circuitry, the MEA block uses both the recursive technique and the over-clocking technique. The decoder can decodes codeword received not only in a burst mode, but also in a continuous mode. It can be used in a wide range of applications because of its versatility. The adaptive RS decoder over GF(2$^{8}$ ) having the error-correcting capability of upto 10 has been designed in VHDL, and successfully synthesized in an FPGA chip.

• 제어로봇시스템학회:학술대회논문집
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• 1999.10a
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• pp.73-78
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• 1999

This paper presents an effective construction method of adaptive multiple control systems utilizing some knowledge upon the plants. The adaptive multiple control system operates plants un-der widely changing environmental conditions. The adaptive multiple control system is composed of a family of candidate controllers together with a supervisor. The system does not require any identification schemes of environmental conditions. Monitoring outputs of the plant, the supervisor switches from one candidate controller to another, The basic ideas of adaptation are as follows: (1)each candidate controller is prepared for each environmental condition in advance; (2)the supervise. applies a sequence of speculative controls to the plant with candidate controllers just after the start of control or just after the detection of a change in the environmental condition. Each candidate controller can keep the system stable during one-step period of the speculative control and the most appropriate candidate controller for the environmental condition to which the system is exposed can be selected before the last trial of speculative control step comes to an end. We proposed a construction method of adaptive multiple control system without any knowledge of plant dynamics and applied the method to a cart-pole balancing problem and a vehicle anti skid braking system. In real applications, as we can often easily obtain a piece of knowledge upon plant dynamics beforehand, we intend to extend the method such that multiple control systems can be efficiently designed using the knowledge. We apply the new idea to the cart-pole balancing problem with variable length of the pole. The simulation experiments lead us to the conclusion that the new attempt can reduce the manpower to design the candidate controllers for adaptive multiple control systems.

• Earthquakes and Structures
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• v.5 no.3
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• pp.261-276
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• 2013

Oil, hysteretic and inertial mass dampers are representatives of passive dampers used for smart enhancement of seismic performance of building structures. Since oil dampers have a nonlinear relief mechanism and hysteretic dampers possess nonlinear restoring-force characteristics, several difficulties arise in the evaluation of buildings including such dampers. The purpose of this paper is to propose a practical method for simultaneous optimal use of such dampers. The optimum design problem is formulated so as to minimize the maximum interstory drift under design earthquakes in terms of a set of damper quantities subject to an equality constraint on the total cost of dampers. The proposed method to solve the optimum design problem is a successive procedure which consists of two steps. The first step is a sensitivity analysis by using nonlinear time-history response analyses, and the second step is a modification of the set of damper quantities based upon the sensitivity analysis. Numerical examples are conducted to demonstrate the effectiveness and validity of the proposed design method.

• ETRI Journal
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• v.37 no.1
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• pp.43-53
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• 2015

In this paper, a selective coefficient updating (SCU) approach at each branch of the per-tone equalization (PTEQ) structure has been applied for insufficient cyclic prefix (CP) length. Because of the high number of adaptive filters and their complex adaption process in the PTEQ structure, SCU has been proposed. Using this method leads to a reduction in the computational complexity, while the performance remains almost unchanged. Moreover, the use of set-membership filtering with variable step size is proposed for a sufficient CP case to increase convergence speed and decrease the average number of calculations. Simulation results show that despite the aforementioned algorithms having similar performance in comparison with conventional algorithms, they are able to reduce the number of calculations necessary. In addition, compensation of both the channel effect and the transmitter/receiver in-phase/quadrature-phase imbalances are achievable by these algorithms.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.15 no.3
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• pp.99-105
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• 2015

This paper deals with the mMMA (modified MMA) which possible to improving the convergence speed that employing the serial connecting form of two stage digital filter instead of signal filter of MMA adaptive equalizer without applying the variable step size for compensates the intersymbol interference by channel distortion in the nonconstant modulus signal. The adaptive equalizer can be implemented by signal digital filter using the finite order tap delay line. In this paper, the equalizer is implemented by the two stage serial form and the filter coefficient are updated by the error signal using the same algorithm of MMA in each stage. The fast convergence speed is determined in the first stage, and the residual isi left at the output of first stage output is minimized in the second stage filter. The same digital filter length was considered in single stage and two stage system and the performance of these systems were compared. The performance index includes the output signal constellation, the residual isi and maximum distortion, MSE that is measure of the convergence characteristics, the SER. As a result of computer simulation, mMMA that has a FIR structure of two stage, has more good performance in every performance index except the constellation diagram due to equalization noise and improves the convergence speed about 1.5~1.8 time than the present MMA that has a FIR structure of single stage.