• Title/Summary/Keyword: varactor

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Implementation of RF Oscillator Using Microstrip Split Ring Resonator (SRR) (마이크로스트립 분리형 링 공진기를 이용한 RF 발진기 구현)

  • Kim, Girae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.2
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    • pp.273-279
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    • 2013
  • In this paper, a novel split ring resonator is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator, and oscillator for 5.8GHz band is designed using proposed split ring resonator. At the fundamental frequency of 5.8GHz, 7.22dBm output power and -83.5 dBc@100kHz phase noise have been measured for oscillator with split ring resonator. The phase noise characteristics of oscillator is improved about 9.7dB compared to one using the general ${\lambda}$/4 microstrip resonator. Because it is possible that varactor diode or lumped capacitor is placed on the gaps of split ring resonator, resonant frequency can be controlled by bias voltage. We can design voltage controlled oscillator using proposed split ring resonator. Thus, due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

Design and Implementation of VCO for X-band with Shorted Coupled C type Resonator (접지된 결합 C형 공진기를 이용한 X대역 전압제어 발진기 설계 및 구현)

  • Kim, Jong-hwa;Kim, Gi-rae
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.9 no.6
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    • pp.539-545
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    • 2016
  • In this paper, a novel coupled C type resonator is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator. Oscillator using proposed shorted coupled C type resonator is designed, it has improved phase noise characteristics. At the fundamental frequency of 9.8GHz, 4.87dBm output power and -84.7 dBc@100kHz phase noise have been measured for oscillator with shorted coupled C type resonator. Next, we designed voltage controlled oscillator using proposed shorted coupled C type resonator with varactor diode. The VCO has 33.8MHz tuning range from 9.7807GHz to 9.8145GHz, and phase noise characteristic is -115~-112.5dBc/Hz@100KHz. Due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

Design and Implementation of a Frequency Tunable Bandpass Filter for TVWS (TVWS용 주파수가변 대역통과필터의 설계 및 구현)

  • Kang, Sanggee
    • Journal of Satellite, Information and Communications
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    • v.11 no.4
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    • pp.44-47
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    • 2016
  • In these days, interest of systems and services using TVWS(TV White Space) are increased, communication systems and services for TVWS have been actively studied. The unoccupied frequency in TVWS is different according to the geographical location and the time of day. RF systems having a frequency tunable bandpass filter operated in TVWS could be efficiently used. In this paper, a frequency tunable bandpass filter operated in 470 ~ 698MHz is designed and implemented. In consideration of simple control and physical size, the tunable bandpass filter is designed with 2-pole. The implemented tunable bandpass filter has the operating frequency band of 470 ~ 698MHz with control voltages of 1.58 ~ 3.93V, the insertion loss of maximum 4.78dB and the return loss of below 10dB. The implemented frequency tunable bandpass filter can be directly used in the RF receiver for TVWS and the design procedures could be used for developing a high power tunable bandpass filter as the basic research data.

Implementation and Design of the Voltage Controlled Oscillator Using Ring type DGS Resonator (링형 DGS 공진기를 이용한 전압제어 발진기의 설계 및 구현)

  • Kim, Girae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.12
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    • pp.2589-2594
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    • 2012
  • In this paper, a novel resonator using ring type DGS is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator, and oscillator for 5.8 GHz band is designed using proposed DGS resonator. The ring type DGS resonator is composed of DGS cell etched on ground plane under $50{\Omega}$ microstrip line. At the fundamental frequency of 5.8 GHz, 7.6 dBm output power and -82.7 dBc@100kHz phase noise have been measured for oscillator with ring type DGS resonator. We designed the voltage controlled oscillator using proposed the DGS resonator with varactor diodes placed between gaps of DGS. Thus, due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

Design of Ku-Band Phase Locked Harmonic Oscillator (Ku-Band용 위상 고정 고조파 발진기 설계)

  • Lee Kun-Joon;Kim Young-Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.1 s.92
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    • pp.49-55
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    • 2005
  • In this paper, the phase locked harmonic oscillator(PLHO) using the analog PLL(Phase Locked Loop) is designed and implemented for a wireless LAN system. The harmonic oscillator is consisted of a ring resonator, a varactor diode and a PLL circuit. Because the fundamental fiequency of 8.5 GHz is used as the feedback signal for the PLL and the 2nd harmonic of 17.0 GHz is used as the output, a analog frequency divider for the phase comparison in the PLL system can be omitted. For the simple PLL circuit, the SPD(Sampling Phase Detector) as a phase comparator is used. The output power of the phase locked harmonic oscillator is 2.23 dBm at 17 GHz. The fundamental and 3rd harmonic suppressions are -31.5 dBc and -29.0 dBc, respectively. The measured phase noise characteristics are -87.6 dBc/Hz and -95.4 dBc/Hz at the of offset frequency of 1 kHz and 10 kHz from the carrier, respectively.

RF Oscillator Improved Characteristics of Phase Noise Using Ring type DGS (위상잡음을 개선한 링형 DGS 공진기를 이용한 RF 발진기)

  • Kim, Gi-Rae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.8
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    • pp.1581-1586
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    • 2012
  • In this paper, a novel resonator using ring type DGS is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator, and oscillator for 5.8GHz band is designed using proposed DGS resonator. The ring type DGS resonator is composed of DGS cell etched on ground plane under $50{\Omega}$ microstrip line. At the fundamental frequency of 5.8GHz, 7.6dBm output power and -82.7 dBc@100kHz phase noise have been measured for oscillator with ring type DGS resonator. The phase noise characteristics of oscillator is improved about 9.5dB compared to one using the general ${\lambda}/4$ microstrip resonator. Because it is possible that varactor diode or lumped capacitor is placed on the gaps of ring type DGS, resonant frequency can be controlled by bias voltage. We can design voltage controlled oscillator using proposed ring type DGS resonator. Thus, due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

A CMOS Intermediate-Frequency Transceiver IC for Wireless Local Loop (무선가입자망용 CMOS 중간주파수처리 집적회로)

  • 김종문;이재헌;송호준
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.8A
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    • pp.1252-1258
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    • 1999
  • This paper describes a COMS IF transceiver IC for 10-MHz bandwidth wireless local loops. It interfaces between the RF section and the digital MODEM section and performs the IF-to-baseband (Rx) and baseband-to-IF (Tx) frequency conversions. The chip incorporates variable gain amplifiers, phase-locked loops, low pass filters, analog-to-digital and digital-to-analog converters. It has been implemented in a 0.6 -${\mu}{\textrm}{m}$ 2-poly 3-metal CMOS process. The phase-locked loops include voltage-controlled oscillators, dividers, phase detectors, and charge pumps on chip. The only external complonents are the filter and the varactor-tuned LC tank circuit. The chip size is 4 mm $\times$ 4 mm and the total supply current is about 57 mA at 3.3 V.

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A Design of 40GHz CMOS VCO (Voltage Controlled Oscillator) for High Speed Communication System (고속 통신 시스템을 위한 40GHz CMOS 전압 제어 발진기의 설계)

  • Lee, Jongsuk;Moon, Yong
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.3
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    • pp.55-60
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    • 2014
  • For an high speed communication, a 40GHz VCO was implemented using a 0.11um standard CMOS technology. The mm-wave VCO was designed by a LC type using a spiral inductor, and a simplified architecture with buffers and a smart biasing technique were used to get a high performance. The frequency range of the proposed VCO is 34~40GHz which is suitable for mm-Wave communication system. It has an output power of -16dBm and 16% tuning range. And the phase noise is -100.33dBc/Hz at 1MHz offset at 38GHz fundamental frequency. The total power consumption of VCO including PADs is 16.8mW with 1.2V supply voltage. The VCO achieves the FOMT of -183.8dBc/Hz which is better than previous VOCs.

A 12 mW ADPLL Based G/FSK Transmitter for Smart Utility Network in 0.18 ㎛ CMOS

  • Park, Hyung-Gu;Kim, Hongjin;Lee, Dong-Soo;Yu, Chang-Zhi;Ku, Hyunchul;Lee, Kang-Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.4
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    • pp.272-281
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    • 2013
  • This paper presents low power frequency shift keying (FSK) transmitter using all digital PLL (ADPLL) for smart utility network (SUN). In order to operate at low-power and to integrate a small die area, the ADPLL is adopted in transmitter. The phase noise of the ADPLL is improved by using a fine resolution time to digital converter (TDC) and digitally controlled oscillator (DCO). The FSK transmitter is implemented in $0.18{\mu}m$ 1-poly 6-metal CMOS technology. The die area of the transmitter including ADPLL is $3.5mm^2$. The power consumption of the ADPLL is 12.43 mW. And, the power consumptions of the transmitter are 35.36 mW and 65.57 mW when the output power levels are -1.6 dBm and +12 dBm, respectively. Both of them are supplied by 1.8 V voltage source. The frequency resolution of the TDC is 2.7 ps. The effective DCO frequency resolution with the differential MOS varactor and sigma-delta modulator is 2.5 Hz. The phase noise of the ADPLL output at 1.8 GHz is -121.17 dBc/Hz with a 1 MHz offset.

An ultra low-noise radio frequency amplifier based on a dc SQUID

  • Andre, Marc-Olivier;Kinion, Darin;Clarke, John;Muck, Michael
    • 한국초전도학회:학술대회논문집
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    • v.10
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    • pp.2-6
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    • 2000
  • We have developed an extremely sensitive radio frequency amplifier based on the dc superconducting quantum interference device (dc SQUID). Unlike a conventional semiconductor amplifier, a SQUID can be cooled to ultra-low temperatures (100 mK or less) and thus potentially achieve a much lower noise temperature. In a conventional SQUID amplifier, where the integrated input coil is operated as a lumped element, parasitic capacitance between the coil and the SQUID washer limits the frequency up to which a substantial gain can be achieved to a few hundred MHz. This problem can be circumvented by operating the input coil of the SQUID as a microstrip resonator: instead of connecting the input signal open. Such amplifiers have gains of 15 dB or more at frequencies up to 3 GHz. If required, the resonant frequency of the microstrip can be tuned by means of a varactor diode connected across the otherwise open end of the resonator. The noise temperature of microstrip SQUID amplifiers was measured to be between $0.5\;K\;{\pm}\;0.3\;K$ at a frequency of 80 MHz and $1.5\;K\;{\pm}\;1.2\;K$ at 1.7 GHz, when the SQUID was cooled to 4.2 K. An even lower noise temperature can be achieved by cooling the SQUID to about 0.4 K. In this case, a noise temperature of $100\;mK\;{\pm}\;20\;mK$ was achieved at 90 MHz, and of about $120\;{\pm}\;100\;mK$ at 440 MHz.

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