• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.2
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• pp.325-328
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• 2020

This paper demonstrated a voltage-controlled oscillator (VCO) using cost-effective (1-poly 6-metal) mixed signal standard CMOS process. To have the high-quality factor inductor in LC resonator with thin metal thickness, patterned-ground shields (PGS) was adopted under the spiral to effectively reduce the ac current of low resistive Si substrate. And, because of thin top-metal compared with that of RF option (2 ㎛), we make electrically connect between the top metal (M6) and the next metal (M5) by great number of via array along the metal traces. The circuit operated from 2.48 GHz to 2.62 GHz tuned by accumulation-mode varactor device. And the measured phase noise of LC VCO has -123.7 dBc/Hz at 1MHz offset at 2.62 GHz and the dc-power consumption shows 2.07 mW with 1.8V supply voltage, respectively.

• Journal of IKEEE
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• v.28 no.1
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• pp.72-77
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• 2024

In this paper, a triple-mode frequency-tunable filter is proposed to meet the recent demands of various frequency bands of mobile communication services. This filter has a tunable structure that can adjust the resonance frequency using a variable capacitor. To improve the quality factor, a SIW(Substrate Integrated Waveguide) structure was introduced and a structure that induces three resonance modes was implemented through a circular hole located in the center. The change in electric field distribution and resonance frequency by the variable capacitor was simulated using HFSS, and the change in electric field distribution and resonance frequency of Triple Mode mode was confirmed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.10
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• pp.1973-1981
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• 1994

A PLDRO(Phase Locked Dielectric Resonator Oscillator) in Ku-band(10.95-11.70GHz) is designed with the concept of the feedback property of PLL(Phase Locked Loop). A series feedback type DRO is developed, and VCDRO(Voltage Controlled Dielectric Resonator Oscillator) using a varactor diode as a voltage-variable capacitor is implemented to tune oscillating frequency electrically. Then, PLDRO is designed by using a SPD(Sampling Phase Detector). This PLDRO is phase-locked voltage controlled DRO to reference source(VHF band) by SPD at 10.00 GHz for European FSS(Fixed Satellite Service). The PLDRO generates output power greater than 10dBm at 10.00 GHz and has phase noise of -80 dBc/Hz at 10 KHz offset from carrier. This PLDRO achieves much better frequency stability than conventional VCDRO.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.2
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• pp.207-212
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• 2012

In this work, a 70/140 GHz dual-band push-push voltage controlled oscillator(VCO) has been developed based on a 0.18-${\mu}m$ SiGe BiCMOS technology. The lower band and the upper band oscillation frequency varied from 67.9 GHz to 76.9 GHz and from 134.3 GHz to 154.5 GHz, respectively, with tuning voltage swept from 0.2 to 2 V. The calibrated maximum output power for each band was -0.55 dBm and -15.45 dBm. The VCO draws DC current of 18 mA from 4 V supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.9 s.351
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• pp.17-22
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• 2006

CMOS LC VCO with fast response adaptive frequency calibration (AFC) technique for IEEE 802.11a/b/g WLANs is designed in 1.8V $0.18{\mu}m$ CMOS process. The possible operation is verified for 5.8GHz band, 5.2GHz band, and 2.4GHz band using the switchable L-C resonators. To linearize its frequency-voltage gain (Kvco), optimized multiple MOS varactor biasing tecknique is used. In order to operate in each band frequency range with reduced VCO gain, 4-bit digitally controlled switched- capacitor bank is used and a wide-range digital logic quadricorrelator (WDLQ) is implemented for fast frequency detector.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.39 no.9
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• pp.44-50
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• 2002

Recently, a envelope tracking(ET) amplifier that improves efficiency by changing of the bias according to the RF input level is presented to use for a high power amplifier of cellular radio handset using CDMA. The input and the output impedances of the ET amplifier may be varied by changing of the bias of the amplifier, and it makes the amplifier having low gain, low efficiency, and high input and output VSWR. In order to improve the input and the output mismatch of the amplifier, in this paper, two types of ET amplifier are suggested. In case of an ET amplifier using varactor diode, in experimentation, gain is improved about 7dB and the power consumption of the amplifier is better about 60% than that of the conventional amplifier. In case of a base voltage controlled ET amplifier, the gain and power consumption of the amplifier is improved about 9dB and 40% than those of the conventional amplifier, respectively.

• Journal of IKEEE
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• v.3 no.1 s.4
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• pp.79-85
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• 1999

In this paper, the resistive mixer for 5.86Hz wireless LAN, main part receiving system, was designed and implemented. The noise characteristics and the linearity in the base band was superior. For the use of local oscillator of mixer, dielectric resonator of stable output and temperature characteristics was designed. For the electrical tuning by the capacitance variation of varactor diode, the microstrip line and magnetic coupling characteristics of the dielectric resonance was used. It was obtained that gain of the proposed resistive mixer containing the RF cable loss, is -13.8dB, the conversion loss of frequency converter is -12 dB, and the output power of local oscillator is 1.67 dBm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.2
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• pp.167-173
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• 2009

This paper proposes an electronically beam steering array antenna, consisting of single fed active element and 4 parasitic elements, operating in 5.8 GHz ISM band. Beam steering can be achieved by controlling the reactance of the variable reactance control circuit connected to the load of the parasitic elements without using the high cost phase shifters. The proposed antenna realizes ${\pm}30^{\circ}$ beam scanning of E-plane and H-plane with the below -10 dB return loss in ISM band. The gain of the $6.18{\sim}7.53\;dBi$ in E-plane and $7.022{\sim}7.779\;dBi$ in H-plane is shown in the scanning range.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.5
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• pp.453-458
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• 2010

In this work, a 18 GHz divide-by-4 injection-locked frequency divider(ILFD) based on ring oscillator has been developed in $0.13-{\mu}m$ Si RFCMOS technology. The free-running oscillation frequency is from 4.98 to 5.22 GHz and output power is about －30 dBm, consuming 33.4 mW with a 1.5 V supply voltage. At 0 dBm input power, the locking range is 3.5 GHz(17.75~21.25 GHz) and with varactor tuning, the operating range is increased up to 5.25 GHz(16.0~21.25 GHz). The fabricated chip size is $0.76\;mm{\times}0.57\;mm$ including DC and RF pad.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.5
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• pp.468-474
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• 2010

In this paper, a VCHO(Voltage Controlled Harmonic Oscillator) for K-band application has been designed and implemented. The proposed oscillator has a structure of two hair-pin resonators placed on input and output of active device. Using in/out common frequency tuning structure, the VCHO yields some advantages of the enhanced fundamental frequency suppression characteristic as well as the improved output power of second harmonic. According to implementation and measurement results, it was shown that a VCHO provides an output power of -2.41 dBm, a fundamental frequency suppression of -21.84 dBc, and phase noise of -101.44 dBc/Hz at 100 kHz offset. In addition, as for the bias voltage from 0 V to -10 V for the varactor diode, output frequency range of 10.58 MHz is obtained with a power variation of ${\pm}0.19\;dB$ over its frequency range.