• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.1268-1270
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• 1993

In this study, the characteristics of Si-$SiO_2$ interface and its degradation in short channel SONOSFET nonvolatile memory devices, fabricated by 1Mbit CMOS process($1.2{\mu}m$ design rule), with $65{\AA}$ blocking oxide layer, $205{\AA}$ nitride layer, and $30{\AA}$ tunneling oxide layer on the silicon wafer were investigated using the charge pumping method. For investigating the Si-$SiO_2$ interface characteristics before and after write/erase cycling, charge pumping current characteristics with frequencies, write/erase cycles, as a parameters, were measured. As a result, average Si-$SiO_2$ interface trap density and mean value of capture cross section were determined to be $1.203{\times}10^{11}cm^{-2}eV^{-1}\;and\;2.091{\times}10^{16}cm^2$ before write/erase cycling, respectively. After cycling, when the write/erase cycles are $10^4$, average $Si-SiO_2$ interface trap density was $1.901{\times}10^{11}cm^{-2}eV^{-1}$. Incresing write/erase cycles beyond about $10^4$, Si-$SiO_2$ interface characteristics with write/erase cycles was increased logarithmically.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.382-382
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• 2010

$TaO_2$ thin films as gate dielectrics have been proposed to overcome the problems of tunneling current and degradation mobility in achieving a thin equivalent oxide thickness. An extremely thin $SiO_2$ layer is used in order to separate the carrier in MOSFETchannel from the dielectric field fluctuation caused by phonons in the dielectric which decreases the carrier mobility. The electronic and optical properties influenced the device performance to a great extent. The atomic structure of amorphous and crystalline Tantalum oxide ($TaO_2$) gate dielectrics thin film on Si (100) were grown by utilizing atomic layer deposition method was examined using Ta-K edge x-ray absorption spectroscopy. By using X-ray photoelectron spectroscopy and reflection electron energy loss spectroscopy (REELS) the electronic and optical properties was obtained. In this study, the band gap (3.400.1 eV) and the optical properties of $TaO_2$ thin films were obtained from the experimental inelastic scattering cross section of reflection electron energy loss spectroscopy (REELS) spectra. EXAFS spectra show that the ordered bonding of Ta-Ta for c-$TaO_2$ which is not for c-$TaO_2$ thin film. The optical properties' e.g., index refractive (n), extinction coefficient (k) and dielectric function ($\varepsilon$) were obtained from REELS spectra by using QUEELS-$\varepsilon$(k, $\omega$)-REELS software shows good agreement with other results. The energy-dependent behaviors of reflection, absorption or transparency in $TaO_2$ thin films also have been determined from the optical properties.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.381-381
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• 2010

$(ZrO_2)_{0.66}(HfO_2)_{0.34}$ thin films as gate dielectrics have been proposed to overcome the problems of tunneling current and degradation mobility inachieving a thin equivalent oxide thickness. An extremely thin $SiO_2$ layer is used in order to separate the carrier in MOSFET channel from the dielectric field fluctuation caused by phonons in the dielectric which decreases the carrier mobility. The electronic and optical properties influenced the device performance to a great extent. $(ZrO_2)_{0.66}(HfO_2)_{0.34}$ dielectric films on p-Si (100) were grown by atomic layer deposition method, for which the conduction band offsets, valence band offsets and band gapswere obtained by using X-ray photoelectron spectroscopy and reflection electron energy loss spectroscopy. The band gap, valence and conduction band offset values for $(ZrO_2)_{0.66}(HfO_2)_{0.34}$ dielectric thin film, grown on Si substrate were about 5.34, 2.35 and 1.87 eV respectively. This band alignment was similar to that of $ZrO_2$. In addition, The dielectric function (k, $\omega$), index of refraction n and the extinction coefficient k for the $(ZrO_2)_{0.66}(HfO_2)_{0.34}$ thin films were obtained from a quantitative analysis of REELS data by comparison to detailed dielectric response model calculations using the QUEELS-$\varepsilon$(k, $\omega$)-REELS software package. These optical properties are similar with $ZrO_2$ dielectric thin films.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.36 no.2
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• pp.125-128
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• 2023

Recently, as the process of the MOS device becomes more detailed, and the degree of integration thereof increases, many problems such as leakage current due to an increase in electron tunneling due to the thickness of SiO₂ used as a gate oxide have occurred. In order to overcome the limitation of SiO₂, many studies have been conducted on HfO₂ that has a thermodynamic stability with silicon during processing, has a higher dielectric constant than SiO₂, and has an appropriate band gap. In this study, HfO₂, which is attracting attention in various fields, was doped with Al and the change in properties according to its concentration was studied. Al-doped HfO₂ thin film was deposited using Plasma Enhanced Atomic Layer Deposition (PEALD), and the structural and electrical characteristics of the fabricated MIM device were evaluated. The results of this study are expected to make an essential cornerstone in the future field of next-generation semiconductor device materials.

• Journal of the Korean Electrochemical Society
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• v.5 no.3
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• pp.111-116
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• 2002

Electrochemical scanning tunneling microscopy was employed to study the evolution of surface morphology during electrochemical preparation of Si(111)-H from Si(111) oxide. Anodic dark current of cyclic voltammogram in 0.2M $NH_4F$ solution (pH 4.7) decreased as the number of cycles increased and remained nearly constant after the second cycle. Then, the Si(111) oxide was entirely stripped, which was followed by H termination on the Si(111) surface. Hydrides at kink and step sites were etched more rapidly than on the terrace, which remained triangle pits with [112] oriented steps where existed stable monohydride. Then, triangle pits deepened. During chronomamperometry at 0.4V anodic dark current shoulder appeared and decreased slowly, indicated the stripping of Si(111) oxide and the formation of stable (112) oriented steps with monohydride. Additionally, the etching mechanism of Si(111)-H in 0.2M $NH_4F(pH 4.7)$ solution at +0.4V was discussed.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.490.2-490.2
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• 2014

Since the general solar cells accept sun light at the front side, excluding the electrode area, electrons move from the emitter to the front electrode and start to collect at the grid edge. Thus the edge of gridline can be important for electrical properties of screen-printed silicon solar cells. In this study, the improvement of electrical properties in screen-printed crystalline silicon solar cells by contact treatment of grid edge was investigated. The samples with $60{\Omega}/{\square}$ and $70{\Omega}/{\square}$ emitter were prepared. After front side of samples was deposited by SiNx commercial Ag paste and Al paste were printed at front side and rear side respectively. Each sample was co-fired between $670^{\circ}C$ and $780^{\circ}C$ in the rapid thermal processing (RTP). After the firing process, the cells were dipped in 2.5% hydrofluoric acid (HF) at room temperature for various times under 60 seconds and then rinsed in deionized water. (This is called "contact treatment") After dipping in HF for a certain period, the samples from each firing condition were compared by measurement. Cell performances were measured by Suns-Voc, solar simulator, the transfer length method and a field emission scanning electron microscope. According to HF treatment, once the thin glass layer at the grid edge was etched, the current transport was changed from tunneling via Ag colloids in the glass layer to direct transport via Ag colloids between the Ag bulk and the emitter. Thus, the transfer length as well as the specific contact resistance decreased. For more details a model of the current path was proposed to explain the effect of HF treatment at the edge of the Ag grid. It is expected that HF treatment may help to improve the contact of high sheet-resistance emitter as well as the contact of a high specific contact resistance.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.134-134
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• 2011

High-k dielectric materials such as $HfO_2$, $ZrO_2$ and $Al_2O_3$ increase gate capacitance and reduce gate leakage current in MOSFET structures. This behavior suggests that high-k materials will be promise candidates to substitute as a tunnel barrier. Furthermore, stack structure of low-k and high-k tunnel barrier named variable oxide thickness (VARIOT) is more efficient.[1] In this study, we fabricated the $WSi_2$ nanocrystals nonvolatile memory device with $SiO_2/HfO_2/Al_2O_3$ tunnel layer. The $WSi_2$ nano-floating gate capacitors were fabricated on p-type Si (100) wafers. After wafer cleaning, the phosphorus in-situ doped poly-Si layer with a thickness of 100 nm was deposited on isolated active region to confine source and drain. Then, on the gate region defined by using reactive ion etching, the barrier engineered multi-stack tunnel layers of $SiO_2/HfO_2/Al_2O_3$ (2 nm/1 nm/3 nm) were deposited the gate region on Si substrate by using atomic layer deposition. To fabricate $WSi_2$ nanocrystals, the ultrathin $WSi_2$ film with a thickness of 3-4 nm was deposited on the multi-stack tunnel layer by using direct current magnetron sputtering system [2]. Subsequently, the first post annealing process was carried out at $900^{\circ}C$ for 1 min by using rapid thermal annealing system in nitrogen gas ambient. The 15-nm-thick $SiO_2$ control layer was deposited by using ultra-high vacuum magnetron sputtering. For $SiO_2$ layer density, the second post annealing process was carried out at $900^{\circ}C$ for 30 seconds by using rapid thermal annealing system in nitrogen gas ambient. The aluminum gate electrodes of 200-nm thickness were formed by thermal evaporation. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer with HP 41501A pulse generator, an Agillent 81104A 80MHz pulse/pattern generator and an Agillent E5250A low leakage switch mainframe. We will discuss the electrical properties for application next generation non-volatile memory device.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.73-75
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• 2013

Atomic force microscopy (AFM) [1] can now not only image individual atoms but also construct atom letters using atom manipulation method [2]. Therefore, the AFM is the second generation atomic tool following the well-known scanning tunneling microscopy (STM). The AFM, however, has the advantages that it can image even insulating surfaces with atomic resolution and also measure the atomic force itself between the tip-apex outermost atom and the sample surface atom. Noting these advantages, we have been developing a novel bottom-up nanostructuring system, as shown in Fig. 1, based on the AFM. It can identify chemical species of individual atoms [3] and then manipulate selected atom species to the designed site one-by-one [2] to assemble complex nanostructures consisted of many atom species at room temperature (RT). In this invited talk, we will introduce our results toward atom-by-atom assembly of composite nanomaterials based on the AFM at RT. To identify chemical species, we developed the site-specific force spectroscopy at RT by compensating the thermal drift using the atom tracking. By converting the precise site-specific frequency shift curves, we obtained short-range force curves of selected Sn and Si atoms as shown in Fig. 2(a) and 2(b) [4]. Then using the atom-by-atom force spectroscopy at RT, we succeeded in chemical identification of intermixed three atom species in Pb/Sn/Si(111)-(${\surd}3$'${\surd}3$) surface as shown in Fig. 2(c) [3]. To create composite nanostructures, we found the lateral atom interchange phenomenon at RT, which enables us to exchange embedded heterogeneous atoms [2]. By combining this phenomenon with the modified vector scan, we constructed the atom letters "Sn" consisted of substitutional Sn adatoms embedded in Ge adatoms at RT as shown in Fig. 3(a)~(f) [2]. Besides, we found another kind of atom interchange phenomenon at RT that is the vertical atom interchange phenomenon, which directly interchanges the surface selected Sn atoms with the tip apex Si atoms [5]. This method is an advanced interchangeable single atom pen at RT. Then using this method, we created the atom letters "Si" consisted of substituted Si adatoms embedded in Sn adatoms at RT as shown in Fig. 4(a)~(f) [5]. In addition to the above results, we will introduce the simultaneous evaluation of the force and current at the atomic scale using the combined AFM/STM at RT.

• Explosives and Blasting
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• v.26 no.2
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• pp.38-44
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• 2008

Recently, planning road construction in South Korea is focused on upgrading of the existing road by rerouting or restructuring. For this, roads under current construction in Korea go for more straight in its alignments and routing. Straight routing makes it all the more required to construct many mountain tunnels and bridges in Korea where mountains are so widely spread. Some portal of mountain tunnel is not rarely planed at high steep slope of mountain valley where it is not easy to secure working space for tunnel excavation. Reverse excavation is an alternative measure for excavation of tunnel portal at high steep slope. Construction in reverse excavation method has three important points requiring careful consideration: 1)planning of pilot tunnel in proper width, height, and length etc., 2)measure against the effect of one-side earth pressure to the direction of tunnel portal, 3)securing tunnel safety against shallow ground condition at portal zone. This paper intends to suggest applicable range of pilot tunnel for reverse excavation at the portal zone located at high steep slope, and shows result of study on the appropriateness of a reverse excavation by means of 3D numerical analysis. Result of 3D numerical analysis for reverse excavation at high steep slope shows that pilot tunneling will be applicable to start from the point $20{\sim}25m$ before the portal from inside the tunnel.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.12
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• pp.1-7
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• 2008

Magnetic Tunneling Junction (MTJ) has been used as a nonvolatile universal storage element mainly in memory technology. However, according to several recent studies, magneto-logic using MTJ elements show much potential in substitution for the transistor-based logic device. Magneto-logic based on MTJ can maintain the data during the power-off mode, since an MTJ element can store the result data in itself. Moreover, just by changing input signals, the full logic functions can be realized. Because of its programmability, it can embody the reconfigurable magneto-logic circuit in the rigid physical architecture. In this paper, we propose a novel 3-bit arbitrary magneto-logic circuit beyond the simple combinational logic or the short sequential one. We design the 3-bit magneto-logic which has the most complexity using MTJ elements and verify its functionality. The simulation results are presented with the HSPICE macro-model of MTJ that we have developed in our previous work. This novel magneto-logic based on MTJ can realize the most complex logic function. What is more, 3-bit arbitrary logic operations can be implemented by changing gate signals of the current drivel circuit.