• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.4
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• pp.286-292
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• 2004

This paper presents a polyphase filtered orthogonal frequency division multiplexing (PF-OFDM) technique. The proposed structure uses a modified discrete Fourier transform (MDFT) transmultiplexer to achieve greater spectral efficiency than an OFDM system, while preserving backward compatibility with it. The prototype PF-OFDM filter has excellent time and frequency localization properties, which matte it possible to eliminate a guard interval (or cyclic prefix) and easily suppress interchannel interference (ICI). This modulation technique uses a single DFT structure, in contrast to a MDFT transmultiplexer, which requires two DFT polyphase filter banks. The PF-OFDM modulation is .justified over multipath Rayleigh fading channels.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1987.04a
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• pp.219-222
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• 1987

A Semi-cusion VLSI Digital Filter Design for TDM/FDM tran-smultiplexer is decribed. Using the polyphase network approach a filter bank composed of only all-pasdigital filter sections was designed. The use of all-pass filters as basic building blocks is shown to provide a Transmultiplexer structure that has low computational requirements low quanization noise and hign modularity. A design of 1st order 2nd All pass filter is done using COMS 2um double metal.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.14 no.4
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• pp.423-434
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• 1989

In this paper, a PRS transmission system using TMRCP as the unit pulse is proposed, which solves the problems occur when the PRS method will be applied to the digital transmultiplexer for each channel. And a design technique which uses this PRS method for the FFT polyphase filter transmultiplexer concept is given. TMRCP-PRS signal require a bandwidth about 2.5KHz(including some guard-band) for a 4-KHz bandlimited voice channel. Therefore, in he 24 channel transmission line, it gives the same advantages as he ordinary PRS system and sloves the inter-channel interference problems. And its good speed-tolerance reduces the time-errors by the environments and the power loss, so it makes the system to be stable. The total system, however, attaces the filters for PCM-PRS, PRS-PCM conversion before and after the transmultiplexer respectively.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1986.04a
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• pp.89-91
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• 1986

• Proceedings of the KIEE Conference
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• 1987.07b
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• pp.850-853
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• 1987

A VLSI digital filter design using a semi-custom method is described. The digital filters composed of TDM/FDM Transmultiplexer are designed. Using the polyphase network approach a filter bank composed of only all-pass digital filter sections was designed. The use of all-pass filters as basic building blocks is shown to provide a transmultiplexer structure that has low computational requirements, low quantization noise, and high modularity. The silicon compiler systems is used to reduce the design time and increase the credibility of designed filters. A design of 1st order and 2nd order all pass filters is done using CMOS 2um N-well double metal cell.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.2
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• pp.190-195
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• 1987

This approach to the transmultiplexer is for the 12-channel TDM/FDM translation system with the polyphase network and the FDCT. For the reduction of the conversion time the 14-point FDCT algorithm is used and the polyphase network which translate the protorype filter into the channel filtrs required in each channel is designed. The prototype filters is designed by the IIR/FIR hybrid filter. The number of numerator terms of the hybrid filter is very large compaired to the denomiator terms. Because of symmetrical properties for numerator terms, required multiplication rate is 0.11396x10**6M/sec.ch. and reduced to 25%-45% of the rate required in the other papers. The proposed system is simulated with the computer and by the results it is proved that the proposed conversion method is valid.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.49-52
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• 1999

In this paper, we describe the structure of the DWMT (discrete wavelet multitone) transceiver for VDSL system. The DWMT transceiver is basically consisted of the transmultiplexer using cosine modulation filter bank (CMFB), time domain equalizer (TEQ) and frequency domain equalizer (FEQ) minimizing the effects of the transmission channel. For FEQ, we expanded the general LMS algorithm to 2-dimensions: time and subchannel axes and examined the 2-dimensional LMS methods with the various array size.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.853-856
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• 1999

In this paper, for the performance evaluation of the discrete wavelet multitone based VDSL modem we have studied VDSL system test loops(VDSL0 - VDSL7) that are proposed by ANSI T1E1.4. In addition, we have modeled the damage factors of the transmission channel and evaluated the data transmission performance of VDSL transmultiplexer based on DWMT in conjunction with the VDSL test loops. For each M-PAM signaling we have evaluated the SNRs that satisfy BER 〓 10$^{-7}$ through simulation and measured the maximum possible transmission speed on each VDSL test loop.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.12 no.3
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• pp.189-199
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• 1987

This paper describes a method to perform the conversion between two widely used multiplexing techniques in telephony. TDM and FDM. This method is based on the digitized Weaver modulator for single side-band modulation, and makes use of a PV digital filter which has commutativity with sinusoidal modulators and periodicity of coefficients. Thus we greatly reduce the complexity and multiplication rate of the system.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.2
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• pp.227-232
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• 1988

A semicustom VLSI design fo digital filters used in TDM/FDM transmultiplexer is described. A filter bank composed of only all-pass digital filter sections are implemented with the polyphase network. The use of all-pass filters as basic building blocks is shown to provide a trans-multiplexer structure that has low computational requirements, low quantization noise, and high modularity. The silicon compiler system is used to reduce the design time and to increase the credibility of designed filters. As a prototype, 1st and 2nd order all pass filter are designed, using CMOS N-well double metal technology. The chip sizes of first order filter and the second order filter are 2652 x 533\ulcorner\ulcorner 5334x4300\ulcorner\ulcorner respectively.