• Title/Summary/Keyword: transistor

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DC and RF Characteristics of 100-nm mHEMT Devices Fabricated with a Two-Step Gate Recess (2단계 게이트 리세스 방법으로 제작한 100 nm mHEMT 소자의 DC 및 RF 특성)

  • Yoon, Hyung Sup;Min, Byoung-Gue;Chang, Sung-Jae;Jung, Hyun-Wook;Lee, Jong Min;Kim, Seong-Il;Chang, Woo-Jin;Kang, Dong Min;Lim, Jong Won;Kim, Wansik;Jung, Jooyong;Kim, Jongpil;Seo, Mihui;Kim, Sosu
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.30 no.4
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    • pp.282-285
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    • 2019
  • A 100-nm gate-length metamorphic high electron mobility transistor(mHEMT) with a T-shaped gate was fabricated using a two-step gate recess and characterized for DC and microwave performance. The mHEMT device exhibited DC output characteristics having drain current($I_{dss}$), an extrinsic transconductance($g_m$) of 1,090 mS/mm and a threshold voltage($V_{th}$) of -0.65 V. The $f_T$ and $f_{max}$ obtained for the 100-nm mHEMT device were 190 and 260 GHz, respectively. The developed mHEMT will be applied in fabricating W-band monolithic microwave integrated circuits(MMICs).

Improvement of Operating Stabilities in Organic Field-Effect Transistors by Surface Modification on Polymeric Parylene Dielectrics (Parylene 고분자 유전체 표면제어를 통한 OFET의 소자 안정성 향상 연구)

  • Seo, Jungyoon;Oh, Seungteak;Choi, Giheon;Lee, Hwasung
    • Journal of Adhesion and Interface
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    • v.22 no.3
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    • pp.91-97
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    • 2021
  • By introducing an organic interlayer on the Parylene C dielectric surface, the electrical device performances and the operating stabilities of organic field-effect transistors (OFETs) were improved. To achieve this goal, hexamethyldisilazane (HMDS) and octadecyltrichlorosilane (ODTS), as the organic interlayer materials, were used to control the surface energy of the Parylene C dielectrics. For the bare case used with the pristine Parylene C dielectrics, the field-effect mobility (μFET) and threshold voltage (Vth) of dinaphtho[2,3-b:2',3'-f ]thieno[3,2-b]- thiophene (DNTT) FET devices were measured at 0.12 cm2V-1s-1 and - 5.23 V, respectively. On the other hand, the OFET devices with HMDS- and ODTS-modified cases showed the improved μFET values of 0.32 and 0.34 cm2V-1s-1, respectively. More important point is that the μFET and Vth of the DNTT FET device with the ODTS-modified Parylene C dielectric presented the smallest changes during a repeated measurement of 1000 times, implying that it has the most stable operating stability. The results could be meaned that the organic interlayer, especially ODTS, effectively covers the Parylene C dielectric surface with alkyl chains and reduces the charge trapping at the interface region between active layer and dielectric, thereby improving the electrical operating stability.

Numerical analysis of heat dissipation performance of heat sink for IGBT module depending on serpentine channel shape (수치 해석을 통한 절연 게이트 양극성 트랜지스터 모듈의 히트 싱크 유로 형상에 따른 방열 성능 분석)

  • Son, Jonghyun;Park, Sungkeun;Kim, Young-Beom
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.22 no.3
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    • pp.415-421
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    • 2021
  • This study analyzed the effect on the cooling performance of the channel shape of a heat sink for an insulated gate bipolar transistor (IGBT). A serpentine channel was used for this analysis, and the parameter for the analysis was the number of curves. The analysis was conducted using computational fluid dynamics with the commercial software ANSYS fluent. One curve in the channel improved the heat dissipation performance of the heat sink by up to 8% compared to a straight-channel heat sink. However, two curves in the channel could not improve the heat discharge performance further. Instead, the two curves caused a higher pressure drop, which induces parasitic loss for the pumping of coolant. The pressure drop of the two-curve channel case was 2.48-2.55 times larger than that of a one-curve channel. This higher pressure drop decreased the heat discharge efficiency of the heat sink with two curves. The discharge heat per unit pressure drop was calculated, and the result of the straight heat sink was highest among the analyzed cases. This means that the heat discharge efficiency of the straight heat sink is the highest.

Property of Nickel Silicides with Hydrogenated Amorphous Silicon Thickness Prepared by Low Temperature Process (나노급 수소화된 비정질 실리콘층 두께에 따른 저온형성 니켈실리사이드의 물성 연구)

  • Kim, Jongryul;Choi, Youngyoun;Park, Jongsung;Song, Ohsung
    • Korean Journal of Metals and Materials
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    • v.46 no.11
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    • pp.762-769
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    • 2008
  • Hydrogenated amorphous silicon(a-Si : H) layers, 120 nm and 50 nm in thickness, were deposited on 200 $nm-SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by E-beam evaporation. Finally, 30 nm-Ni/120 nm a-Si : H/200 $nm-SiO_2$/single-Si and 30 nm-Ni/50 nm a-Si:H/200 $nm-SiO_2$/single-Si were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 30 minute. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide on the 120 nm a-Si:H substrate showed high sheet resistance($470{\Omega}/{\Box}$) at T(temperature) < $450^{\circ}C$ and low sheet resistance ($70{\Omega}/{\Box}$) at T > $450^{\circ}C$. The high and low resistive regions contained ${\zeta}-Ni_2Si$ and NiSi, respectively. In case of microstructure showed mixed phase of nickel silicide and a-Si:H on the residual a-Si:H layer at T < $450^{\circ}C$ but no mixed phase and a residual a-Si:H layer at T > $450^{\circ}C$. The surface roughness matched the phase transformation according to the silicidation temperature. The nickel silicide on the 50 nm a-Si:H substrate had high sheet resistance(${\sim}1k{\Omega}/{\Box}$) at T < $400^{\circ}C$ and low sheet resistance ($100{\Omega}/{\Box}$) at T > $400^{\circ}C$. This was attributed to the formation of ${\delta}-Ni_2Si$ at T > $400^{\circ}C$ regardless of the siliciation temperature. An examination of the microstructure showed a region of nickel silicide at T < $400^{\circ}C$ that consisted of a mixed phase of nickel silicide and a-Si:H without a residual a-Si:H layer. The region at T > $400^{\circ}C$ showed crystalline nickel silicide without a mixed phase. The surface roughness remained constant regardless of the silicidation temperature. Our results suggest that a 50 nm a-Si:H nickel silicide layer is advantageous of the active layer of a thin film transistor(TFT) when applying a nano-thick layer with a constant sheet resistance, surface roughness, and ${\delta}-Ni_2Si$ temperatures > $400^{\circ}C$.

Property of Nickel Silicides with 10 nm-thick Ni/Amorphous Silicon Layers using Low Temperature Process (10 nm-Ni 층과 비정질 실리콘층으로 제조된 저온공정 나노급 니켈실리사이드의 물성 변화)

  • Choi, Youngyoun;Park, Jongsung;Song, Ohsung
    • Korean Journal of Metals and Materials
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    • v.47 no.5
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    • pp.322-329
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    • 2009
  • 60 nm- and 20 nm-thick hydrogenated amorphous silicon (a-Si:H) layers were deposited on 200 nm $SiO_2/Si$ substrates using ICP-CVD (inductively coupled plasma chemical vapor deposition). A 10 nm-Ni layer was then deposited by e-beam evaporation. Finally, 10 nm-Ni/60 nm a-Si:H/200 nm-$SiO_2/Si$ and 10 nm-Ni/20 nm a-Si:H/200 nm-$SiO_2/Si$ structures were prepared. The samples were annealed by rapid thermal annealing for 40 seconds at $200{\sim}500^{\circ}C$ to produce $NiSi_x$. The resulting changes in sheet resistance, microstructure, phase, chemical composition and surface roughness were examined. The nickel silicide on a 60 nm a-Si:H substrate showed a low sheet resistance at T (temperatures) >$450^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate showed a low sheet resistance at T > $300^{\circ}C$. HRXRD analysis revealed a phase transformation of the nickel silicide on a 60 nm a-Si:H substrate (${\delta}-Ni_2Si{\rightarrow}{\zeta}-Ni_2Si{\rightarrow}(NiSi+{\zeta}-Ni_2Si)$) at annealing temperatures of $300^{\circ}C{\rightarrow}400^{\circ}C{\rightarrow}500^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate had a composition of ${\delta}-Ni_2Si$ with no secondary phases. Through FE-SEM and TEM analysis, the nickel silicide layer on the 60 nm a-Si:H substrate showed a 60 nm-thick silicide layer with a columnar shape, which contained both residual a-Si:H and $Ni_2Si$ layers, regardless of annealing temperatures. The nickel silicide on the 20 nm a-Si:H substrate had a uniform thickness of 40 nm with a columnar shape and no residual silicon. SPM analysis shows that the surface roughness was < 1.8 nm regardless of the a-Si:H-thickness. It was confirmed that the low temperature silicide process using a 20 nm a-Si:H substrate is more suitable for thin film transistor (TFT) active layer applications.

An Exploratory research on patent trends and technological value of Organic Light-Emitting Diodes display technology (Organic Light-Emitting Diodes 디스플레이 기술의 특허 동향과 기술적 가치에 관한 탐색적 연구)

  • Kim, Mingu;Kim, Yongwoo;Jung, Taehyun;Kim, Youngmin
    • Journal of Intelligence and Information Systems
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    • v.28 no.4
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    • pp.135-155
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    • 2022
  • This study analyzes patent trends by deriving sub-technical fields of Organic Light-Emitting Diodes (OLEDs) industry, and analyzing technology value, originality, and diversity for each sub-technical field. To collect patent data, a set of international patent classification(IPC) codes related to OLED technology was defined, and OLED-related patents applied from 2005 to 2017 were collected using a set of IPC codes. Then, a large number of collected patent documents were classified into 12 major technologies using the Latent Dirichlet Allocation(LDA) topic model and trends for each technology were investigated. Patents related to touch sensor, module, image processing, and circuit driving showed an increasing trend, but virtual reality and user interface recently decreased, and thin film transistor, fingerprint recognition, and optical film showed a continuous trend. To compare the technological value, the number of forward citations, originality, and diversity of patents included in each technology group were investigated. From the results, image processing, user interface(UI) and user experience(UX), module, and adhesive technology with high number of forward citations, originality and diversity showed relatively high technological value. The results provide useful information in the process of establishing a company's technology strategy.

Enhancing Electrical Properties of Sol-Gel Processed IGZO Thin-Film Transistors through Nitrogen Atmosphere Electron Beam Irradiation (질소분위기 전자빔 조사에 의한 졸-겔 IGZO 박막 트랜지스터의 전기적 특성 향상)

  • Jeeho Park;Young-Seok Song;Sukang Bae;Tae-Wook Kim
    • Journal of the Microelectronics and Packaging Society
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    • v.30 no.3
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    • pp.56-63
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    • 2023
  • In this paper, we studied the effect of electron beam irradiation on sol-gel indium-gallium-zinc oxide (IGZO) thin films under air and nitrogen atmosphere and carried out the electrical characterization of the s ol-gel IGZO thin film transistors (TFTs). To investigate the optical properties, crystalline structure and chemical state of the sol-gel IGZO thin films after electron beam irradiation, UV-Visible spectroscopy, X-ray diffraction (XRD), and X-ray photoelectron spectroscopy (XPS) were carried out. The sol-gel IGZO thin films exhibited over 80% transmittance in the visible range. The XRD analysis confirmed the amorphous nature of the sol-gel IGZO films regardless of electron beam irradiation. When electron beam irradiation was conducted in a nitrogen (N2) atmosphere, we observed an increased proportion of peaks related to M-O bonding contributed to the improved quality of the thin films. Sol-gel IGZO TFTs subjected to electron beam exposure in a nitrogen atmosphere exhibited enhanced electrical characteristics in terms of on/off ratio and electron mobility. In addition, the electrical parameters of the transistor (on/off ratio, threshold voltage, electron mobility, subthreshold swing) remained relatively stable over time, indicating that the electron beam exposure process in a nitrogen atmosphere could enhance the reliability of IGZO-based thin-film transistors in the fabrication of sol-gel processed TFTs.

Study on the Morphologies and Electrical Properties in Polymer Blend Thin-Films Based on Two Poly(3-hexylthiophene) Conjugated Polymers with Different Regio-regularities (서로 다른 위치 규칙성을 가지는 두 개의 Poly(3-hexylthiophene) 공액 고분자를 기반으로 한 고분자 복합 박막의 구조와 전기적 특성에 대한 연구)

  • Ganghoon Jeong;Nann Aye Mya Mya Phu;Rae-Su Park;Jeong Woo Yun;Yeongun Ko;Mincheol Chang
    • Composites Research
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    • v.36 no.5
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    • pp.349-354
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    • 2023
  • Poly(3-hexylthiophene) (P3HT) is a conjugated polymer that is highly soluble in organic solvents and is readily available. However, its electrical properties as an active channel in electronic devices are not enough for practical applications, necessitating further improvement in the properties. In this study, we demonstrate that the blending of two P3HT polymers (i.e., regio-regular (RR) P3HT and regio-random (RRa) P3HT) with different regioregularities can significantly improve charge transport characteristics of the blend films. The morphological and electrical properties of the blend films were systematically investigated by varying the ratio between two P3HT polymers. Atomic force microscopy (AFM), X-ray diffraction (XRD), and UV-visible absorption spectroscopy (UV-vis) were employed to evaluate the morphological and optoelectronic properties of the blend films. The crystallinity of the blend films increased with increasing the content of RRa-P3HT to 20 wt% and gradually decreased as the content increased to 80%. Consistently, the highest charge carrier mobility was obtained from the blend films containing 20 wt% RRa-P3HT, which value was measured to be 0.029 cm2/V·s. The values gradually decreased to 0.0007 cm2/V·s with increasing the content of RRa-P3HT to 80 wt%.

Field-effect Transistors Based on a Van der Waals Vertical Heterostructure Using CVD-grown Graphene and MoSe2 (화학기상증착법을 통해 합성된 그래핀 및 MoSe2를 이용한 반데르발스 수직이종접합 전계효과 트랜지스터)

  • Seon Yeon Choi;Eun Bee Ko;Seong Kyun Kwon;Min Hee Kim;Seol Ah Kim;Ga Eun Lee;Min Cheol Choi;Hyun Ho Kim
    • Journal of Adhesion and Interface
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    • v.24 no.3
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    • pp.100-104
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    • 2023
  • Van der Waals heterostructures have garnered significant attention in recent research due to their excellent electronic characteristics arising from the absence of dangling bonds and the exclusive reliance on Van der Waals forces for interlayer coupling. However, most studies have been confined to fundamental research employing the Scotch tape (mechanical exfoliation) method. We fabricated Van der Waals vertical heterojunction transistors to advance this field using materials exclusively grown via chemical vapor deposition (CVD). CVDgrown graphene was patterned through photolithography to serve as electrodes, while CVD-grown MoSe2 was employed as the pickup/transfer material, resulting in the realization of Van der Waals heterojunction transistors with interlayer charge transfer effects. The electrical characteristics of the fabricated devices were thoroughly examined. Additionally, we observed variations in the transistor's performance based on the presence of defects in MoSe2 layer.

Fabrication of High Density and High Uniformity Irradiation Light Source for Exposure Curing System Using 365 nm and 385 nm Wavelength SMD LED and High Transmittance Silicone Resin TIR Bar Type Lens (365 nm 및 385 nm SMD LED와 TIR 바형 렌즈를 이용하는 고밀도 고균일성 특성의 경화용 광원모듈 제작 )

  • Pil Hong Jeong;Beom Jin Kim;Yeong Jin Kim;Dong Gyu Jeon;Hyo Min Kim;Jae Hyeon Kim;Hyeong Min Kim;Gyu Seong Lee;Kawan Anil;Eung Ryul Park;Soon Jae Yu;Min Jun Ann;Do Won Hwang
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.37 no.4
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    • pp.394-399
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    • 2024
  • An irradiator is developed using two UVA wavelength ranges of SMD LEDs as a curing light source. This module has dimensions of 545×111×300 mm3 and is equipped with a TIR bar-shaped lens made of PDMS silicone resin. The developed irradiator offers high uniformity, with 89% in the centerline of the horizontal axis direction, for two different wavelength ranges of 365 nm and 385 nm. The radiation intensity from the light source module shows highly directional characteristics, and the irradiator provides a maximum irradiance of 1,634 mW/cm2 at a working distance of 50 mm. During the initial 5 minutes of operation, the irradiance experiences a rapid decrease. However, this issue is addressed by optimizing the LED's current reduction characteristics and managing the Transistor's temperature rise in the constant current circuit. After continuous operation for approximately 60 minutes. The highest temperature, near the central part of the irradiating surface, reaches 69.7℃, while the lowest temperature, near the edges, is 41.1℃.