• Title/Summary/Keyword: total harmonic distortion

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Design of Parameters for High Power Static Var Compensator Used Cascade Multilevel Inverter (직렬형 멀티레벨 인버터를 사용한 대용량 무효전력 보상장치의 파라메타 설계)

  • Min, Wan-Ki;Choi, Jae-Ho
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.52 no.4
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    • pp.172-178
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    • 2003
  • This paper examines the application of high voltage static var compensator(SVC) with cascade multilevel inverter which employs H-bridge inverter(HBI). This method has the primary advantage that the number of voltage levels can be increased for a given number of semiconductor devices when compared to the conventional control methods. The SVC system is modeled using the d-q transform which calculates the instantaneous reactive power. This model is used to design a controller and analyze the SVC system. From the mathematical model of the system, the design procedures of the circuit parameters L and C are presented in this thesis. To meet the specific total harmonic distortion(THD) and ripple factor of the capacitor voltage, the circuit parameters L and C are designed. Simulated and experimental results are also presented and discussed to validate the proposed schemes.

Design of the LC Filter Considering Total Harmonic Distortion (THD를 고려한 DVR 시스템의 LC필터 설계)

  • Kim, Wang-Rae;Lim, Byung-Kuk;Shon, Jin-Geun;Jeon, Hee-Jong
    • Proceedings of the KIPE Conference
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    • 2005.07a
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    • pp.490-493
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    • 2005
  • In order to reduce the harmonics in invertor output of the DVR system, typically LC filter is employed. In designing the LC filter, it is required to consider the gild impedance and the characteristic of the harmonics. In this paper, problems in the conventional way of designing the LC filter is analyzed and new LC fitter design technique is proposed. In the proposed technique, parameters of the LC filter are calculated considering grid impedance, THD, DC link voltage and phase lag. The validity and feasibility of the proposed method is verified through the simulations experiments. The DVR system with the proposed LC filter is being built and tested.

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THD Reduction by Using HBML-PWM Hybrid Type Inverter (HBML-PWM 혼용 인버터를 이용한 THD 저감)

  • Yi, Tao;Moon, C.J.;Song, S.G.;Park, S.J.;Cho, S.E.;Kim, J.D.
    • Proceedings of the KIPE Conference
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    • 2005.07a
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    • pp.655-658
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    • 2005
  • In this paper, we proposed the electric circuit using one common arm of H-Bridge Inverters to reduce the number of switching component in multi-level inverter combined with H-Bridge Inverters and Transformers. and furthermore we suggested the new multi-level PWU inverter using PWM level to reduce THD(Total Harmonic Distortion). and we used the switching method that can be same rate of usage at each transformer. Also, we tested the proposed prototype 9-level inverter to clarify the proposed electric circuit and reasonableness of control signal for the proposed multi-level PWM inverter.

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Multi-level PWM Inverter Considering the number of Output Voltage level and Current rating (출력전압 레벨 수와 전류정격을 고려한 PWM 다중레벨 인버터)

  • Park, N.S.;Seo, J.J.;Park, S.J.;Kim, K.H.;Cho, S.E.;Kim, C.U.
    • Proceedings of the KIPE Conference
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    • 2005.07a
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    • pp.659-662
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    • 2005
  • In this paper, we proposed the novel hybrid multi-level inverter using combination of the output voltage of transformers to reduce the THD(Total Harmonic Distortion) and improve the waveform of output voltage. The proposed multi-level inverter used the output of transformer which is 1times, 2times, 4times of input of the transformers. So we increased the output voltage from the reduce the number of switching component and transformer. Also, we tested the proposed prototype 15-level inverter to clarify the proposed electric circuit and reasonableness of control signal for the proposed multi -level PWM inverter.

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Low frequency Multi-level Switching Strategy based on Phase-Shift Control (위상 변위제어기법을 이용한 저주파 다중레벨 스위칭 방식)

  • Yu, Tao;Moon, C.J.;Park, S.J.;Nam, H.K.;Kwon, S.J.
    • Proceedings of the KIPE Conference
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    • 2005.07a
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    • pp.673-676
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    • 2005
  • In this paper, we proposed the electric circuit using one common arm of H-Bridge Inverters to reduce the number of switching component in multi-level inverter combined with H-Bridge Inverters and Transformers. and furthermore we suggested the new multi-level PWM inverter using PWM level to reduce THD(Total Harmonic Distortion). and we used the switching method that can be same rate of usage at each transformer. Also, we tested the proposed prototype 9-level inverter to clarify the proposed electric circuit and reasonableness of control signal for the proposed multi-level PWM inverter.

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Improved Active Power Filter Performance Based on an Indirect Current Control Technique

  • Adel, Mohamed;Zaid, Sherif;Mahgoub, Osama
    • Journal of Power Electronics
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    • v.11 no.6
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    • pp.931-937
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    • 2011
  • This paper presents a method for the performance improvement of a shunt active power filter (SAPF) using the indirect current control (ICC) scheme. Compared to the conventional direct current control (DCC) scheme, the ICC gives better performance with a lower number of sensors. A simplified and efficient control algorithm using a low cost Intel 80C196KC microcontroller is implemented using only two current sensors for the source current and one voltage sensor for the DC-link voltage of the SAPF circuit. The objective is to eliminate harmonics and to compensate the reactive power produced by non-linear loads such as an uncontrolled rectifier feeding an inductive load. The APF is realized using a three phase voltage source inverter (VSI) with a dc bus capacitor. Experimental results are presented to prove the better performance of the ICC method over the DCC one.

Analysis and Design of a PFC AC-DC Converter with Electrical Isolation

  • Lin, Chia-Ching;Yang, Lung-Sheng;Zheng, Ren-Jun
    • Journal of Power Electronics
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    • v.14 no.5
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    • pp.874-881
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    • 2014
  • This study presents a single-phase power factor correction AC-DC converter that operates in discontinuous conduction mode. This converter uses the pulse-width modulation technique to achieve almost unity power factor and low total harmonic distortion of input current for universal input voltage $90V_{rms}$ to $264V_{rms}$) applications. The converter has a simple structure and electrical isolation. The magnetizing-inductor energy of the transformer can be recycled to the output without an additional third winding. The steady-state analysis of voltage gain and boundary operating conditions are discussed in detail. Finally, experimental results are shown to verify the performance of the proposed converter.

Comparative Analysis of Three-Phase AC-DC Converters Using HIL-Simulation

  • Raihan, Siti Rohani Sheikh;Rahim, Nasrudin Abd.
    • Journal of Power Electronics
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    • v.13 no.1
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    • pp.104-112
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    • 2013
  • This paper presents a comparative evaluation of various topologies for three-phase power converters using the hardware-in-the-loop (HIL) simulation technique. Various switch-mode AC-DC power converters are studied, and their performance with respect to total harmonic distortion (THD), efficiency, power factor and losses are analyzed. The HIL-simulation is implemented in an Altera Cyclone II DE2 Field Programmable Gate Array (FPGA) Board and in the Matlab/Simulink environment. A comparison of the simulation and HIL-simulation results is also provided.

Dead-time compensation algorithm on synchronous frame for 3-phase inverter (3상 인버터를 위한 동기좌표계에서의 위치기반 데드타임 보상알고리즘)

  • Lim, Jeongwoo;Cho, Younghoon
    • Proceedings of the KIPE Conference
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    • 2018.07a
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    • pp.27-29
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    • 2018
  • 본 논문은 상 전류의 위치(전기각)를 기반으로 보상전압을 결정하는 새로운 데드타임 보상알고리즘을 제안한다. 제안하는 알고리즘은 보상전압을 결정하는데 있어, 전류의 극성대신 제어하는 상 전류의 위치(전기각)를 이용하기 때문에 추가적인 알고리즘 없이 간단하게 보상전압을 정의할 수 있다. 또한 제안하는 데드타임 보상알고리즘은 동기좌표계에 바로 적용가능하기 때문에 3상 전압형 인버터(VSIs; Voltage Source Inverters)에 일반적으로 사용되는 동기좌표기반 제어기에 적용이 용이하고 추가적인 변환과정 없이 동기좌표에서의 인버터 출력전압을 추정할 수 있다. 제안하는 데드타임 보상알고리즘의 효과와 성능을 검증하기 위하여 전압형 3상 인버터를 이용한 L-R부하 실험이 진행되었으며, 상 전류파형의 FFT(Fast Fourier Transfrom)와 THD(Total Harmonic Distortion)를 산정하여 정량적 분석을 병행하였다.

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A Design and Analysis on Performance of Wireless Home Theater System (무선 전송방식의 홈시어터 설계 및 이의 성능 분석)

  • Kang, Kyoung-Won
    • Proceedings of the IEEK Conference
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    • 2007.07a
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    • pp.181-182
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    • 2007
  • Wireless home theater and speaker system was designed. That has 20W output per channel, 0.1% THD (Total Harmonic Distortion) and automatic algorithm avoiding noise. The 3D stereophonic sound was realized through the wireless 5.1channel speaker system designed. That could be secured 0.4% improvement effect of THD compared with wire speaker systems. Specially in transfer sound with wireless, Frequency Hopping Spread Spectrum was superior than Direct Sequence Spread Spectrum in household electric appliances and wireless internet environment that radiated noise similar with ISM Band using 2.4GHz.

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