• 제목/요약/키워드: total gate capacitance

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4.5kV/1.5kA급 IGCT 설계 및 특성분석 (Design of 4.5kV/1.5kA IGCT)

  • 김형우;김상철;서길수;김은동
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.1
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    • pp.357-360
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    • 2003
  • In this paper, we designed 4.5kV/1.5kA IGCT devices. GCT thyristor has many superior characteristics compared with GTO thyristor, for examples; snubberless turn-off capability, short storage time, high turn-on capability, small turn-off gate charge and low total power loss of the application system containing device and peripheral parts such as anode reactor and snubber capacitance. In this paper we designed GCT thyristor devices, and analyzed static and dynamic characteristics of GCT thyristor depending on the minority carrier lifetime, n-base thickness and doping concentration of n-base region, respectively. Especially, turn-on and turn-off characteristics are very important characteristics for GCT thyristor devices. So, we considered above characteristic for design and analysis of GCT devices.

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스위칭 트랜지스터를 이용하여 2.4/3.5/5.2 GHz에서 동작하는 다중 대역 저잡음 증폭기 설계 (Design of Multi-Band Low Noise Amplifier Using Switching Transistors for 2.4/3.5/5.2 GHz Band)

  • 안영빈;정지채
    • 한국전자파학회논문지
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    • 제22권2호
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    • pp.214-219
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    • 2011
  • 본 논문에서는 2.4, 3.5, 5.2 GHz의 대역에 맞추어 스위칭 동작을 하는 다중 대역 저잡음 증폭기를 CMOS 0.18 um 공정을 이용하여 설계하였다. 제안된 회로는 스위칭 트랜지스터를 이용하여 입력단에서는 트랜스 컨덕턴스, 게이트-소스 캐패시턴스를 조정하고, 출력단에서는 캐패시턴스를 조정하는 방식으로 다중 대역 입출력 정합을 이루었다. 제안된 저잡음 증폭기는 각 스위칭 트랜지스터의 동작 상태에 따라 2.4, 3.5, 5.2 GHz 대역에서 제안된 회로는 입출력단에서 각각 14.2, 12, 11 dB의 이득과 3, 2.9, 2.8의 잡음 지수 특성을 갖는다. 다중 대역 저잡음 증폭기는 1.8 V의 공급 전압에 대해서 4.2~5.4 mW의 전력을 소비한다.

Performance and Variation-Immunity Benefits of Segmented-Channel MOSFETs (SegFETs) Using HfO2 or SiO2 Trench Isolation

  • Nam, Hyohyun;Park, Seulki;Shin, Changhwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권4호
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    • pp.427-435
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    • 2014
  • Segmented-channel MOSFETs (SegFETs) can achieve both good performance and variation robustness through the use of $HfO_2$ (a high-k material) to create the shallow trench isolation (STI) region and the very shallow trench isolation (VSTI) region in them. SegFETs with both an HTI region and a VSTI region (i.e., the STI region is filled with $HfO_2$, and the VSTI region is filled with $SiO_2$) can meet the device specifications for high-performance (HP) applications, whereas SegFETs with both an STI region and a VHTI region (i.e., the VSTI region is filled with $HfO_2$, and the STI region is filled with $SiO_2$) are best suited to low-standby power applications. AC analysis shows that the total capacitance of the gate ($C_{gg}$) is strongly affected by the materials in the STI and VSTI regions because of the fringing electric-field effect. This implies that the highest $C_{gg}$ value can be obtained in an HTI/VHTI SegFET. Lastly, the three-dimensional TCAD simulation results with three different random variation sources [e.g., line-edge roughness (LER), random dopant fluctuation (RDF), and work-function variation (WFV)] show that there is no significant dependence on the materials used in the STI or VSTI regions, because of the predominance of the WFV.

FVF-Based Low-Dropout Voltage Regulator with Fast Charging/Discharging Paths for Fast Line and Load Regulation

  • Hinojo, Jose Maria;Lujan-Martinez, Clara;Torralba, Antonio;Ramirez-Angulo, Jaime
    • ETRI Journal
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    • 제39권3호
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    • pp.373-382
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    • 2017
  • A new internally compensated low drop-out voltage regulator based on the cascoded flipped voltage follower is presented in this paper. Adaptive biasing current and fast charging/discharging paths have been added to rapidly charge and discharge the parasitic capacitance of the pass transistor gate, thus improving the transient response. The proposed regulator was designed with standard 65-nm CMOS technology. Measurements show load and line regulations of $433.80{\mu}V/mA$ and 5.61 mV/V, respectively. Furthermore, the output voltage spikes are kept under 76 mV for 0.1 mA to 100 mA load variations and 0.9 V to 1.2 V line variations with rise and fall times of $1{\mu}s$. The total current consumption is $17.88{\mu}V/mA$ (for a 0.9 V supply voltage).

In0.8Ga0.2As HEMT 소자에서 Output-conductance가 차단 주파수에 미치는 영향에 대한 연구 (Effect of Output-conductance on Current-gain Cut-off frequency in In0.8Ga0.2As High-Electron-mobility Transistors)

  • 노태범;김대현
    • 센서학회지
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    • 제29권5호
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    • pp.324-327
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    • 2020
  • The impact of output conductance (go) on the short-circuit current-gain cut-off frequency (fT) in In0.8Ga0.2As high-electron-mobility transistors (HEMTs) on an InP substrate was investigated. An attempted was made to extract the values of fT in a simplified small-signal model (SSM) of the HEMTs, derive an analytical formula for fT in terms of the extrinsic model parameters of the simplified SSM, which are related to the intrinsic model parameters of a general SSM, and verify its validity for devices with Lg from 260 to 25 nm. In long-channel devices, the effect of the intrinsic output conductance (goi) on fT was negligible. This was because, from the simplified SSM perspective, three model parameters, such as gm_ext, Cgs_ext and Cgd_ext, were weakly dependent on goi. However, in short-channel devices, goi was found to play a significant role in degrading fT as Lg was scaled down. The increase in goi in short-channel devices caused a considerable reduction in gm_ext and an overall increase in the total extrinsic gate capacitance, yielding a decrease in fT with goi. Finally, the results were used to infer how fT is influenced by goi in HEMTs, emphasizing that improving electrostatic integrity is also critical importance to benefit fully from scaling down Lg.