• Journal of Communications and Networks
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• v.8 no.1
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• pp.38-48
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• 2006

A synchronous multicarrier (MC) code-division multiple access (CDMA) system using inverse fast Fourier transform (IFFT) and fast Fourier transform (FFT) for the downlink mobile communication system operating in a frequency selective Rayleigh fading channel is analyzed. Both carrier frequency offset and timing offset are considered in the analysis. Bit error rate performance of the system with both equal gain combining and maximum ratio combining are obtained. The performance is compared to that of the conventional system using correlation receiver. It is shown that when subcarrier number is large, the system using IFFT/FFT has nearly the same performance as the conventional one, while when the sub carrier number is small, the system using IFFT/FFT will suffer slightly worse performance in the presence of carrier frequency offset.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.11
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• pp.1743-1751
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• 1989

In this paper, we consider trellis-coding techniques with the convolutional encoder R=k/(k+1) for improving the reliability of digital transimission over bandlimited noisy PRS and 49-QPRS channels. Employing the R=k/(k+1) convolutional code for the PRS channel results in over 3 dB of coding gain comparing with the baseline system. The trellis-coded 49-QPRS system can be realized by combining the 9-QPRS system with the R=1/2 convolutiona code, which can be improved by over 2dB coding gain comparing with the 9-QPRS system. In additin, we study a method of avoiding the occurance of unlimited runs of identical output to prevent operation of timing error.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.239-240
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• 2008

A new frequency offset estimator using low cross-property of PN sequences is proposed in the orthogonal frequency division multiple access (OFDMA) uplink systems. Simulation results show that the proposed estimator improves the mean square error (MSE) performance compared to conventional estimator [2] where each user have both different timing offset and different frequency offset. In addition, the MSE performance is improved as the length of PN sequence increases.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1997.04a
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• pp.756-760
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• 1997

In this research, the automatic level measurement system used in land leveling was developed. By using a laser transmitter and a receiver as measuring equipments, level was measured automatically. The driving part of this system was composed of stepping motor, timing belt and pulley. It drived the laser receiver to track laser beam generated form the laser transmitter. The level measuring experiments were performed about three level change shapes (step, random, sine). This system could measure step level change of which amplitude was 40mm in 0.5s, random level change within .+-. mm, maximum measurement error. In case of sine level change, experiment was executed with varying the spatial frequency of level change. As a result, this system was able to measure sine level change of which spatial frequency was 0.5m $^{-1}$ accurately.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.1
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• pp.52-59
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• 1991

An effective and accurate delay time model is the key problem in the simulation and timing verification of CMOS logic circuits. We propose a semi-analytic CMOW delay time model taking into account the configuration ratio, the input waveform slope and the load capacitance. This model is based on the Schichman Hodges's DC equations and derived on the optimally weighted switching peak current. The parameters necessary for the model calculation are automatically determined from the program. The proposed model is computationally effective and the error is typically within 10% of the SPICEA results. Compared to the table RC model, the accuracy is inproved over two times in average.

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.253-256
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• 2001

This paper describes a high speed MAC(Media Access Control) function chip for IEEE 802.11 MAC layer protocol. The MAC chip has control registers and interrupt scheme for interface with CPU and deals with transmission/reception of data as a unit of frame. The developed MAC chip is composed of protocol control block, transmission block, and reception block which supports the BCF function in IEEE 802.11 specification. The test suite which is adopted in order to verify operation of the MAC chip includes various functions, such as RTS-CTS frame exchange procedure, correct IFS(Inter Frame Space)timing, access procedure, random backoff procedure, retransmission procedure, fragmented frame transmission/reception procedure, duplicate reception frame detection, NAV(Network Allocation Vector), reception error processing, broadcast frame transmission/reception procedure, beacon frame transmission/reception procedure, and transmission/reception FIEO operation. By using this technique, it is possible to reduce the load of CPU and firmware size in high speed wireless LAN system.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.202-207
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• 2015

A CMOS relaxation oscillator, with high robustness over process, voltage and temperature (PVT) variations, is designed in $0.18{\mu}m$ CMOS. The proposed oscillator, consisting of full-differential charge-discharge timing circuit and switched-capacitor based voltage-to-current conversion, could be expanded to a simple open-loop frequency synthesizer (FS) with output frequency digitally tuned. Experimental results show that the proposed oscillator conducts subcarrier generation for frequency-modulated ultra-wideband (FM-UWB) transmitters with triangular amplitude distortion less than 1%, and achieves frequency deviation less than 8% under PVT and phase noise of -112 dBc/Hz at 1 MHz offset frequency. Under oscillation frequency of 10.5 MHz, the presented design has the relative FS error less than 2% for subcarrier generation and the power dissipation of 0.6 mW from a 1.8 V supply.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2006.11a
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• pp.171-174
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• 2006

OFDM(orthogonal frequency division modulation)은 주파수 선택적인 페이딩 환경에서 높은 전송율과 빠른 속도를 가지는 효율적인 전송 기법이다. 그러나 OFDM 심볼이 시작되는 지점을 정확히 찾지 못하면 시간 영역에서 위상회전으로 인해 수신 데이터의 BER(bit error rate)이 높아질 수 있다. QPSK(quadrature phase shift king)변조를 이용한 OFDM 시스템에선 정수배의 샘플 옵셋만 아니라 소수배의 샘플 옵셋까지 보상하여 동기를 획득해야 한다. QPSK 심볼 복조 시 소수배의 샘플 옵셋이 잔존할 경우 시스템의 수신 성능은 떨어지기 때문이다. 본 논문에서는 QPSK변조를 이용한 OFDM 시스템에서 소수배의 샘플 옵셋이 존재할 경우 동기를 획득하는 방법에 대해 제안한다. 본 논문에서 제안된 심볼 타이밍 동기 방법은 수신된 트레이닝 심볼의 상관관계를 이용하여 0.5 샘플 이전과 이후의 충격응답을 각각 구하여 이들을 차를 이용하여 동기를 획득한다. 제안한 심볼 타이밍 동기 기법의 성능은 멀티패스의 모델화 채널을 적용한 모의실험을 통하여 검증하였다.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2011.11a
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• pp.74-77
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• 2011

본 논문에서는, 지상파 3D HDTV 방송 전송을 위한 VSB(Vestigial Side Band) 변조방식의 심벌 타이밍 및 반송파 동기부 구조를 제안하고 그 성능을 검증해 보았다. 제안하는 동기부의 동작은 다음과 같다. 먼저 반송파 주파수 옵셋에 독립적인 심벌 타이밍 복구 알고리즘으로 타이밍 동기를 이룬다. 그리고 제안하는 프레임 검출 방법으로 프레임의 시작점을 알아내고, 반송파 주파수 옵셋 복구에 필요한 훈련 열을 얻어낸다. 마지막으로, 얻어진 훈련 열을 이용하여 반송파 주파수 옵셋과 반송파 위상 옵셋을 복구한다. 컴퓨터 모의실험 결과, 제안하는 동기부 구조는 이상적으로 동기를 이루었을 때의 BER(bit error rate)성능과 근접한 성능을 나타내었다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.12A
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• pp.1774-1780
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• 2000

본 논문에서는 TDMA 방식의 고속의 버스트 데이터 전송에서 프리앰블의 오버샘플링 데이터 값을 이용한 새로운 피드포워드 타이밍 추정 기법을 제안한다. 제안된 추정 기법은 검출 오류 분산 값 (DEV : Detection Error Variance) 측면에서 기존의 여러 타이밍 추정기법과 MCRB (Modified Cramer-Rao Bound)와 비교되어 진다. 또한, 제안된 타이밍 추정 기법을 고정 샘플링 클럭과 타이밍 보정기로서 보간 필터를 이용한 심볼 동기 블록을 적용하여 이상적인 경우의 BER과 그 성능을 비교한 결과 이상적인 경우에 비해 성능 저하가 BER이 $10^{-3}$인 지점에서 최대 0.2dB 이내임을 확인하였다.