• Title/Summary/Keyword: time code generator

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An Implementation of Time Code Generator for Sending Real Time Information (실 시각정보 전송을 위한 시각코드발생기 제작)

  • Kim, Young-Beom;Park, Young-Tae;Lee, Young-Kyu
    • Journal of The Institute of Information and Telecommunication Facilities Engineering
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    • v.6 no.3
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    • pp.9-13
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    • 2007
  • In this paper, we propose a system that can be used to provide the national standard time for the general public with ease by using the self-implemented independent time-code generator for transmitting standard time information through both the wired and the wireless networks. The newly proposed time code is different from conventional methods in the point that it has a structural advantage of having an ability of obtaining reliable data by repeatedly transmitting the same information. We observe that it is sufficiently possible to transmit the time information with a microsecond level because measurement result shows that the system uncertainty is about few nanosecond of time-error fluctuation through the self characteristic measurement of total system including the time-code generator and decoder system receiving time-information.

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A study of the stack allocation policy on JIT Code Generator (JIT Code Generator 상의 스택할당 정책 적용에 관한 연구)

  • 김효남
    • Journal of the Korea Society of Computer and Information
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    • v.6 no.4
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    • pp.100-103
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    • 2001
  • The best solution to improve the execution speed of Java program is to make use of the high speed JVM(Java Virtual Machine). The performance of JVM depends on the difference of its implementation. One of the technologies to enhance JVM performance is a JIT(Just-in-Time) code generator. The JIT code generator transforms Java byte code to the native machine code in accordance with computer system platform. The native machine code is faster than the existing interpreter method, since it can reduce the time to analyze the Java byte code. But the JIT code generator have the problem of increasing the traffic between stack and register because of using many register. Therefore, this paper suggests how to reduce the traffic by applying the policy of stack allocation to JIT code generation, as one of the methods to enhance the performance of JVM.

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A study stack allocation on JIT Code Generator for reducing register load traffic (레지스터 로드 트래픽 감소를 위한 JIT Code Generator에 스택할당 정책 적용 방안 연구)

  • Song, Kyung-Nam;Kim, Hyo-Nam;Won, Yoo-Hun
    • Proceedings of the Korea Information Processing Society Conference
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    • 2001.10b
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    • pp.1541-1544
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    • 2001
  • Java virtual machine의 성능을 향상시키기 위해 "JIT(Just-in-Time)"code generator가 고안되었다[3], JIT code generator는 스택기반의 자바 바이트 코드를 레지스터 기반의 native machine code로 변환해 주는 역할을 수행하여 바이트 코드의 번역시간을 줄여준다. 그러나 JIT 는 많은 레지스터의 사용을 야기시키므로 효율적인 레지스터 allocation 정책이 필요하고 스택과 레지스터 간의 traffic 을 가중시킨다. 그러므로 본 논문에서는 자바 바이트 코드의 효율적인 stack allocation 정책을 JIT code generator에 적용함으로 레지스터와의 traffic을 줄이는 방법을 제시하였다.

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A Study of Automatic Code Generation for TMO-based Real-time Object Model (TMO 기반의 실시간 객체 모델의 코드 자동생성기법 연구)

  • Seok, Mi-Heui;Ryu, Ho-Dong;Lee, Woo-Jin
    • The KIPS Transactions:PartA
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    • v.19A no.2
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    • pp.101-112
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    • 2012
  • In recently years, distributed real-time software has performed important roles in various areas. Real-time applications should be performed with satisfying strict constraints on response time. Usually real-time applications are developed on the real-time supporting middleware such as TMO(Time-triggered, Message-triggered Object), CORBA/RT, and RTAI. However, it is not easy to develop applications using them since these real-time middleware are unfamiliar to programmers. In this paper, we propose an automatic code generator for real-time application based on TMO in order to reduce development costs. For increasing or reflecting the characteristics of TMO into the design model, SpM and SvM methods are added into the class diagram, which have time constraints as their properties. And behaviors of them are represented as separated regions on state machine diagram in different abstract level. These diagrams are inputted into TMO-based code automatic generator, which generates details of the TMO class. Our approach has advantages for decreasing effort and time for making real time software by automatically generating TMO codes without detailed knowledge of TMO.

Retargetable Intermediate Code Optimization System Using Tree Pattern Matching Techniques (트리패턴매칭기법의 재목적 가능한 중간코드 최적화 시스템)

  • Kim, Jeong-Suk;O, Se-Man
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.8
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    • pp.2253-2261
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    • 1999
  • ACK generates optimized code using the string pattern matching technique in pattern table generator and peephole optimizer. But string pattern matching method is not effective due to the many comparative actions in pattern selection. We designed and implemented the EM intermediate code optimizer using tree pattern matching algorithm composed of EM tree generator, optimization pattern table generator and tree pattern matcher. Tree pattern matching algorithm practices the pattern matching that centering around root node with refer to the pattern table, with traversing the EM tree by top-down method. As a result, compare to ACK string pattern matching methods, we found that the optimized code effected to pattern selection time, and contributed to improved the pattern selection time by about 10.8%.

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A Wideband Clock Generator Design using Improved Automatic Frequency Calibration Circuit (개선된 자동 주파수 보정회로를 이용한 광대역 클록 발생기 설계)

  • Jeong, Sang-Hun;Yoo, Nam-Hee;Cho, Seong-Ik
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.2
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    • pp.451-454
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    • 2011
  • In this paper, a wideband clock generator using novel Automatic frequency calibration(AFC) scheme is proposed. Wideband clock generator using AFC has the advantage of small VCO gain and wide frequency band. The conventional AFC compares whether the feedback frequency is faster or slower then the reference frequency. However, the proposed AFC can detect frequency difference between reference frequency with feedback frequency. So it can be reduced an operation time than conventional methods AFC. Conventional AFC goes to the initial code if the frequency step changed. This AFC, on the other hand, can a prior state code so it can approach a fast operation. In simulation results, the proposed clock generator is designed for DisplayPort using the CMOS ring-VCO. The VCO tuning range is 350MHz, and a VCO frequency is 270MHz. The lock time of clock generator is less then 3us at input reference frequency, 67.5MHz. The phase noise is -109dBC/Hz at 1MHz offset from the center frequency. and power consumption is 10.1mW at 1.8V supply and layout area is $0.384mm^2$.

Automatic Generation of Code Optimizer for DFA Pattern Matching (DFA 패턴 매칭을 위한 코드 최적화기의 자동적 생성)

  • Yun, Sung-Lim;Oh, Se-Man
    • The KIPS Transactions:PartA
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    • v.14A no.1 s.105
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    • pp.31-38
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    • 2007
  • Code Optimization is converting to a code that is equivalent to given program but more efficient, and this process is processed in Code Optimizer. This paper designed and processed Code Optimizer Generator that automatically generates Code Optimizer. In other words Code Optimizer is automatically generated for DFA Pattern Matching which finds the optimal code for the incoming pattern description. DFA Pattern Matching removes redundancy comparisons that occur when patterns are sought for through normalization process and improves simplification and structure of pattern shapes for low cost. Automatic generation of Code Optimization for DFA Pattern Matching eliminates extra effort to generate Code Optimizer every time the code undergoes various transformations, and enables formalism of Code Optimization. Also, the advantage of making DFA for optimization is that it is faster and saves cost of Code Optimizer Generator.

A Polynomial-Time Algorithm for Breaking the McEliece's Public-Key Cryptosystem (McEliece 공개키 암호체계의 암호해독을 위한 Polynomial-Time 알고리즘)

  • Park, Chang-Seop-
    • Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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    • 1991.11a
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    • pp.40-48
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    • 1991
  • McEliece 공개키 암호체계에 대한 새로운 암호해독적 공격이 제시되어진다. 기존의 암호해독 algorithm이 exponential-time의 complexity를 가지는 반면, 본고에서 제시되어지는 algorithm은 polynomial-time의 complexity를 가진다. 모든 linear codes에는 systematic generator matrix가 존재한다는 사실이 본 연구의 동기가 된다. Public generator matrix로부터, 암호해독에 사용되어질 수 있는 새로운 trapdoor generator matrix가 Gauss-Jordan Elimination의 역할을 하는 일련의 transformation matrix multiplication을 통해 도출되어진다. 제시되어지는 algorithm의 계산상의 complexity는 주로 systematic trapdoor generator matrix를 도출하기 위해 사용되는 binary matrix multiplication에 기인한다. Systematic generator matrix로부터 쉽게 도출되어지는 parity-check matrix를 통해서 인위적 오류의 수정을 위한 Decoding이 이루어진다.

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Best-Estimate Analysis of MSGTR Event in APR1400 Aiming to Examine the Effect of Affected Steam Generator Selection

  • Jeong, Ji-Hwan;Chang, Keun-Sun;Kim, Sang-Jae;Lee, Jae-Hun
    • Nuclear Engineering and Technology
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    • v.34 no.4
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    • pp.358-369
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    • 2002
  • Abundant information about analyses of single steam generator tube rupture (SGTR) events is available because of its importance in terms of safety. However, there are few literatures available on analyses of multiple steam generator tube rupture (MSGTR) events. In addition, knowledge of transients and consequences following a MSGTR event are very limited as there has been no occurrence of MSGTR event in the commercial operation of nuclear reactors. In this study, a postulated MSGTR event in an APR1400 is analyzed using thermal-hydraulic system code MARSI.4. The present study aims to examine the effects of affected steam generator selection. The main steam safety valve (MSSV) lift time for four cases are compared in order to examine how long operator response time is allowed depending on which steam generate. (S/G) is affected. The comparison shows that the cases where two steam generators are simultaneously affected allow longer time for operator action compared with the cases where a single steam generator is affected. Furthermore, the tube ruptures in the steam generator where a pressurizer is connected leads to the shortest operator response time.

A High Voltage Pulse Generator Using a Rotatary Airhole Spark Gap Code (회전 공극형 고전압 펄스발생장치)

  • 문재덕;이종훈;이복희
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.53 no.5
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    • pp.268-272
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    • 2004
  • A high voltage pulse generator with a rotator airhole spark gap instead of a rotary ball spark gap has been proposed and investigated. Its feasibility as a high voltage pulse generator is compared with the rotary ball spark gap type one. Parametric studies showed that proposed the rotary airhole type spark gap had a very stable breakdown voltage and reliable pulse repetition time compared with the conventional rotary ball type spark gap. This however showed that the proposed pulse generator with a rotary airhole spark gap instead of a rotary ball spark gap could be potentially used as a very stable and reliable pulse generator in the various fields of applications.