• The Mathematical Education
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• v.60 no.3
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• pp.249-264
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• 2021

This article is devoted to investigating young learners' understanding of elapsed time from socio-cultural perspectives. The socio-cultural perspective benefits to access and personalize mathematics learning as how to have a mathematical object to be able to realize signifiers with the help of many other mathematical words and mediators. In terms of the realization of signifiers, I analyzed performances on elapsed time tasks of students in Grades 3 (n=115) and interviewed focal students. Quantitative analysis on students' performance identified that students perform differently when the task provided with the analog clock signifier. It suggested that students might think in a different way upon the given signifier even for the same elapsed time, especially when given as the analog clock. Qualitative analysis on focal students' interviews visualized how the students' understanding were different by displaying individual realization trees on elapsed time. The particular location of the analog clock signifier on each realization tree provided a personalized explanation about low performance on the task with analog clock signifier. The finding suggested that the realization of a specific signifier could be a key point in elapsed time understanding. I discussed why a majority of students face difficulty in elapsed time learning indicated analog clock and the advantage of moving elapsed time strands to higher grades in the school mathematics curriculum.

• Journal of Institute of Control, Robotics and Systems
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• v.19 no.2
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• pp.125-130
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• 2013

Compared to OWR (One-Way Ranging) method that requires precise network time synchronization, TWR (Two-Way Ranging) method has advantages in building an indoor WPAN (Wireless Personal Area Network) location system with lower cost. However, clock offsets of nodes in WPAN system should be eliminated or compensated to improve location accuracy of the TWR method. Because conventional clock offset elimination methods requires multiple TWR transactions to reduce clock offset, they produce network traffic burden instead. This paper presents a clock offset estimation method that can reduce clock offset error with a single TWR transaction. After relative clock offsets of sensor nodes are estimated, clock offsets of mobile tags are estimated using a single TWR communication. Simulation results show that location accuracy of the proposed method is almost similar to the conventional clock offset elimination method, while its network traffic is about a half of the conventional method.

• ETRI Journal
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• v.30 no.2
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• pp.275-281
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• 2008

A 40 Gb/s clock and data recovery (CDR) module for a fiber-optic receiver with improved phase-locked loop (PLL) circuits has been successfully implemented. The PLL of the CDR module employs an improved D-type flip-flop frequency acquisition circuit, which helps to stabilize the CDR performance, to obtain faster frequency acquisition, and to reduce the time of recovering the lock state in the event of losing the lock state. The measured RMS jitter of the clock signal recovered from 40 Gb/s pseudo-random binary sequence ($2^{31}-1$) data by the improved PLL clock recovery module is 210 fs. The CDR module also integrates a 40 Gb/s D-FF decision circuit, demonstrating that it can produce clean retimed data using the recovered clock.

• Journal of Astronomy and Space Sciences
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• v.28 no.1
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• pp.79-91
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• 2011

Ongnu (Jade Clepsydra; also called Heumgyeonggaknu) is a water clock was made by Jang Yeong-sil in 1438. It is not only an automatic water clock that makes the sound at every hour on the hour by striking bell, drum and gong, but also an astronomical clock that shows the sun's movement over time. Ongnu's power mechanism used is a water-hammering method applied to automatic time-signal device. The appearance of Ongnu is modeled by Gasan (pasted-paper imitation mountain) and Binpungdo (landscape of farming work scene) is drawn at the foot of the mountain. The structure of Ongnu is divided into the top of the mountain, the foot of the mountain and the flatland. There located are sun-movement device, Ongnyeo (jade female immortal; I) and Four gods (shaped of animal-like immortals) at the top of the mountain, Sasin (jack hour) and Musa (warrior) at the foot of the mountain, and Twelve gods, Ongnyeo (II) and Gwanin on the flatland. In this study, we clearly and systematically understood the time-announcing mechanism of each puppet. Also, we showed the working mechanism of the sun-movement device. Finally, we completely established the 3D model of Ongnu based on this study.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.6
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• pp.446-455
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• 2001

In this paper, the precise synchronized clock generator using GPS receiver is presented. The GPS receiver provides a synchronized IPPS signal which guaranties a reliable standard time mark. This signal allows us to do time synchronization and correct the time step. We designed and implemented the precise synchronized clock generator based on DPLL in order to generate a high-resolution clock from a low-cost inaccurate oscillator with ALTERA FLEX EPM6016TC144-3. We also implemented a hardware unit and proved that the unit provides 1MHz clock output which had a high resolution and accuracy when it was combined with GPS receiver.

• Journal of The Institute of Information and Telecommunication Facilities Engineering
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• v.3 no.2
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• pp.11-17
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• 2004

In this paper we propose a new conceptual system for a network clock in which all node clocks are simultaneously synchronized to the national standard by intermediation parameter of satellite time. Experiments have shown the possibility of its adoption by real networks. The new proposed method has various structural benefits, in particular all node clocks can be kept at the same hierarchical quality in contrast to the existing method. The measurement results show that the accuracy of the experimental slave clock system can be kept within a few parts In 1012 and the MTIE (Maximum Time Interval Error) sufficiently meets ITU-T G.811 for the primary reference clock. A prototype system with fully automatic operational functions has been realized at present and is expected to be directly used for communication network synchronization in the near future.

• Journal of Positioning, Navigation, and Timing
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• v.5 no.3
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• pp.157-163
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• 2016

Clocks for time synchronization using radio signals such as global navigation satellite system (GNSS) may lose reference signals by intentional or unintentional jamming. This is called as holdover. When holdover occurs, a clock goes into free run in which synchronization performance is degraded considerably. In order to maintain the required precise time synchronization during holdover, accurate estimation on main parameters such as frequency offset and frequency drift is needed. It is necessary to implement an optimum filter through various simulation tests by creating clock noise in accordance with given specifications in order to estimate the main parameters accurately. In this paper, a method that creates clock noise in accordance with given specifications is described.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.2
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• pp.451-454
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• 2011

In this paper, a wideband clock generator using novel Automatic frequency calibration(AFC) scheme is proposed. Wideband clock generator using AFC has the advantage of small VCO gain and wide frequency band. The conventional AFC compares whether the feedback frequency is faster or slower then the reference frequency. However, the proposed AFC can detect frequency difference between reference frequency with feedback frequency. So it can be reduced an operation time than conventional methods AFC. Conventional AFC goes to the initial code if the frequency step changed. This AFC, on the other hand, can a prior state code so it can approach a fast operation. In simulation results, the proposed clock generator is designed for DisplayPort using the CMOS ring-VCO. The VCO tuning range is 350MHz, and a VCO frequency is 270MHz. The lock time of clock generator is less then 3us at input reference frequency, 67.5MHz. The phase noise is -109dBC/Hz at 1MHz offset from the center frequency. and power consumption is 10.1mW at 1.8V supply and layout area is $0.384mm^2$.

• Journal of Institute of Control, Robotics and Systems
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• v.14 no.7
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• pp.624-628
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• 2008

This paper is concerned with multiple motor control using a distributed network control method. Speed and position of multiple motors are synchronized using clock synchronized distributed controllers. CAN (controller area network) is used and a new clock synchronization algorithm is proposed and implemented. To verify the proposed control algorithm, two disks which are attached on two motor shafts are controlled to rotate at the same speed and phase angle with the same time base using network clocks.

• Journal of KIISE:Information Networking
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• v.32 no.6
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• pp.668-675
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• 2005

With the proliferation of wireless network and the advances of the embedded systems, the traditional distributed systems begin to include the wireless embedded systems. Clock synchronization in the distributed systems is one of the major issues that should be considered for diverse Purposes including synchronization, ordering, and consistency. Many clock synchronization algorithms have been proposed over the years. Since clock synchronization in wireless embedded systems should consider the low bandwidth of a network and the poor resources of a system, most traditional algorithms cannot be applied directly. We propose a clock synchronization algorithm in wireless embedded systems, extending IEEE 802.11 standard. The proposed algorithm can not only achieve high precision by loosening constraints and utilizing the characteristics of wireless broadcast but also provide continuous time synchronization by tolerating the message losses. In master/slave structure the master broadcasts the time information and the stave computes the clock skew and the drift to estimate the synchronized time of the master. The experiment results show that the achieved standard deviation by the Proposed scheme is within the bound of about 200 microseconds.