• Title/Summary/Keyword: time amplifier

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Design and Fabrication of a High-Power Pulsed TWTA for Millimeter-Wave(Ka-Band) Multi-Mode Seeker (밀리미터파(Ka 밴드) 복합모드 탐색기용 고출력 펄스형 진행파관 증폭기(TWTA) 설계 및 제작)

  • Song, Sung-Chan;Kim, Sun-Ki;Lee, Sung-Wook;Min, Seong-Ki
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.30 no.4
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    • pp.307-313
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    • 2019
  • The traveling wave tube amplifier (TWTA), which can be applied to the Ka-band millimeter-wave multi-mode seeker, consists of an high voltage power supply(HVPS), a grid modulator, a command and control, and an RF assembly. We designed a power supply that generates a -17.9 kV high voltage by synchronizing the pulse repetition frequency(PRF) and power supply switching frequency(i.e. synchronization frequency), and a high-speed grid-switching modulator for RF pulse modulation. The TWTA, which is fabricated through miniaturization with a volume of 3.18 L, has high pulse switching characteristics of up to 18.5 ns. The maximum rise/fall time of the grid on/bias signal and peak power is more than 564.9 W. Moreover, an excellent spurious performance of -68.4 dBc or less was confirmed within the range of PRF and PRF/2.

A Robust Harmonic Compensation Technique using Digital Lock-in Amplifier under the Non-Sinusoidal Grid Voltage Conditions for the Single Phase Grid Connected Inverters (디지털 록인 앰프를 이용한 비정현 계통 전압 하에서 강인한 단상계통 연계 인 버터용 고조파 보상법)

  • Khan, Reyyan Ahmad;Ashraf, Muhammad Noman;Choi, Woojin
    • Proceedings of the KIPE Conference
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    • 2018.11a
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    • pp.95-97
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    • 2018
  • The power quality of Single Phase Grid-Connected Inverters (GCIs) has received much attention with the increasing number of Distributed Generation (DG) systems. However, the performance of single phase GCIs get degraded due to several factors such as the grid voltage harmonics, the dead time effect, and the turn ON/OFF of the switches, which causes the harmonics at the output of GCIs. Therefore, it is not easy to satisfy the harmonic standards such as IEEE 519 and P1547 without the help of harmonic compensator. To meet the harmonic standards a certain kind of harmonic controller needs to be added to the current control loop to effectively mitigate the low order harmonics. In this paper, the harmonic compensation is performed using a novel robust harmonic compensation method based on Digital Lock-in Amplifier (DLA). In the proposed technique, DLAs are used to extract the amplitude and phase information of the harmonics from the output current and compensate it by using a simple PI controller in the feedforward manner. In order to show the superior performance of the proposed harmonic compensation technique, it is compared with those of conventional harmonic compensation methods in terms of the effectiveness of harmonic elimination, complexity, and implementation. The validity of the proposed harmonic compensation techniques for the single phase GCIs is verified through the experimental results with a 5kW single phase GCI. Index Terms -Single Phase Grid Connected Inverter (SPGCI), Harmonic Compensation Method, Total Harmonic Distortion (THD) and Harmonic Standard.

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A Portable Impedance Spectroscopy Instrument for the Measurement of the Impedance Spectrum of High Voltage Battery Pack (고압 배터리 팩의 임피던스 스펙트럼 측정용 휴대용 임피던스 분광기)

  • Rahim, Gul;Choi, Woo-Jin
    • The Transactions of the Korean Institute of Power Electronics
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    • v.26 no.3
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    • pp.192-198
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    • 2021
  • The battery's State of Health (SOH) is a critical parameter in the process of battery use, as it represents the Remaining Useful Life (RUL) of the battery. Electrochemical Impedance Spectroscopy (EIS) is a widely used technique in observing the state of the battery. The measured impedance at certain frequencies can be used to evaluate the state of the battery, as it is intimately tied to the underlying chemical reactions. In this work, a low-cost portable EIS instrument is developed on the basis of the ARM Cortex-M4 Microcontroller Unit (MCU) for measuring the impedance spectrum of Li-ion battery packs. The MCU uses a built-in DAC module to generate the sinusoidal sweep perturbation signal. Moreover, it performs the dual-channel acquisition of voltage and current signals, calculates impedance using a Digital Lock-in Amplifier (DLA), and transmits the result to a PC. By using LabVIEW, an interface was developed with the real-time display of the EIS information. The developed instrument was suitable for measuring the impedance spectrum of the battery pack up to 1000 V. The measurement frequency range of the instrument was from 1 hz to 1 Khz. Then, to prove the performance of the developed system, the impedance of a Samsung SM3 battery pack and a Bexel pouch module were measured and compared with those obtained by the commercial instrument.

A Study on Wireless Broadband Internet RF Down Converter Design and Production (휴대무선인터넷 RF 하향 변환기 설계 및 제작에 관한 연구)

  • Lee, Chang-Hee;Won, Young-Jin;Lee, Jong-Yong;Lee, Sang-Hun;Lee, Won-Seok;Ra, Keuk-Hwan
    • 전자공학회논문지 IE
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    • v.45 no.1
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    • pp.31-37
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    • 2008
  • A Wibro RF down converter of 2.3GHz band is designed and implemented in this paper. The problems that can occur in the receiver LNA(Low Noise Amplifier) to minimize additional purposes. In addition, 2.3GHz band from the 75 MHz downward to minimize the losses in the process, transform and improve efficiency, and achieve stable characteristics can be used to make high frequency characteristics of the device. Wibro repeater uses a TDMA(Time Division Multiplexing Access) method is needed because the RF switch. Production criterion specification, the input voltage from +8 V 1.2A of current consumption, 60dB gain and the noise figure of less than 2.5dB, VSWR(Voltage Standing Wave Ratio) less than 1.5, more than IMD(Inter Modulation Distortion) 60dB satisfied. Environmental conditions ($-20^{\circ}C$ to $70^{\circ}C$) to pass the test of reliability in a long time, that seemed crafted Wibro down converter be applied to the Wibro repeater.

Total Degradation Performance Evaluation of the Time- and Frequency-Domain Clipping in OFDM Systems (OFDM 시스템에서 시간 및 주파수 영역 클리핑의 Total Degradation 성능평가)

  • Han, Chang-Sik;Seo, Man-Jung;Im, Sung-Bin
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.7 s.361
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    • pp.17-22
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    • 2007
  • OFDM (Orthogonal Frequency Division Multiplexing) is a special case of multicarrier transmission, where a single data stream is transmitted over a number of lower-rate subcarrier. One of the main reasons to use OFDM is to increase robustness against frequency-selective fading or narrowband interference. Unfortunately, an OFDM signal consists of a number of independently modulated subcarriers, which can give a large PAPR (Peak-to-Average Power Ratio) when added up coherently. In this paper, we investigate the performance of a simple PAPR reduction scheme, which requires no change of a receiver structure or no additional information transmission. The approach we employed is clipping in the time and frequency domains. The time-domain clipping is carried out with a predetermined clipping level while the frequency-domain clipping is done within EVM (Error Vector Magnitude). This approach is suboptimal with lower computational complexity compared to the optimal method. This evaluation is carried out on the OFDM system with an nonlinear amplifier. The simulation results demonstrated that the PAPR reduction algorithm is one of ways to reduce the effects of the nonlinear distortion of an HPA (High Power Amplifier).

A 10-bit CMOS Time-Interpolation Digital-to-Analog Converter (10-비트 CMOS 시간-인터폴레이션 디지털-아날로그 변환기)

  • Kim, Myngyu;Jang, Young-Chan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.10a
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    • pp.225-228
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    • 2012
  • In this paper, a 10-bit digital-to-analog converter (DAC) with small area is proposed. The 10-bit DAC consists of a 8-bit decoder, a 2-bit time-interpolator, and a buffer amplifier. The proposed time-interpolation is achieved by controlling the charging time through a low-pass filter composed of a resistor and a capacitor. To implement the accurate time-interpolator, a control pulse generator using a replica circuit is proposed to minimize the effect of the process variation. The proposed 10-bit Time-Interpolation DAC occupies 61 % of the conventional 10-bit resistor-string DAC. The proposed DAC is designed using a $0.35{\mu}m$ CMOS process with a 3.3 V supply. The simulated DNL and INL are +0.15/-0.21 LSB and +0.15/-0.16 LSB, respectively.

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Analysis of multi-channel photoplethysmograph parameter by the changes of arterial characteries (동맥계 다채널 용적맥파 특징 파라미터 분석에 관한 연구)

  • Han, Soon-Chen;Kim, Hyoung-Jo;Kim, Hyoung-Tae;Kim, Jung-Kuk;Huh, Woong
    • Proceedings of the IEEK Conference
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    • 2003.07c
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    • pp.2745-2748
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    • 2003
  • In this paper, we implement the photoplethysmo-graphy system that have three channel pulse wave detects and one channel ECG amplifier. In order to detect the artery state, we measured the pulse waves at different positions, simultaneously. In general, arterial vascular system suffers the decrease of compliance, increase of resistance, and decrease of distensibility through aging. Therefore, we compared and analyzed variation of tile Pulse waves parameter both in time and frequency domains that is concerned with the changes of arterial characteries. And then evaluated the correlation coefficients between the parameters variation and the age group. As the result of experiment, we found that the Parameters have a significant correlation about aging.

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A Nonlinear Adaptive Predistorter for the Compensation of Nonlinearities in High Power Amplifier (고출력증폭기의 비선형성 보정을 위한 비선형 적응 Predistorter)

  • 임용훈;서정태;윤대희;서광락;소용수
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.7
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    • pp.16-25
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    • 1994
  • The major reason that reduces the performance of satellite communication channels is known as the nonlinearities of high power amplifiers(HPA's) which are usually modeled by memoryless nonlinear systems, in the channels. This paper proposes a nonlinear adaptive predistorter,which predistorts the input symbols such that the symbol passing through the nonlinear HPA preserves the desired constellation, and derives the region of convergence for the predistorter. The predistorter has capability of coping adaptively with any time-varying environment such as changes of operating points if HPA since the coefficients of the predistorter which has a form of truncated Tayler series are obtained by recursive optimization procedure utilizing QAM data sequence directely. Simulation results show that the proposed one with 16 QAM input has better performance than the conventional fixed predistorter with the same input.

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Fabrication and Output Characteristics of a High-Speed Wavelength Swept Mode-Locked Laser (고속 파장가변 모드잠김 레이저의 제작 및 출력특성)

  • Lee, Eung-Je;Kim, Yong-Pyung
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.6
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    • pp.1117-1121
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    • 2007
  • We demonstrate a wavelength swept mode-locked ring laser for the frequency domain optical coherence tomography(FD OCT). A laser is constructed by using a semiconductor optical amplifier, fiber Fabry-Perot tunable filter and 2.6 km fiber ring cavity. Mode-locking is implemented by 2.6 km fiber ring cavity for matching the fundamental or harmonic of cavity roundtrip time to a sweep period. The wavelength sweeps are repetitively generated with the repetition period of 77.2 kHz which is the parallel resonance frequency of Fabry-Perot tunable filter for the low driving current consumption of the fiber Fabry-Perot tunable filter. The wavelength tuning range of the laser is more than FWHM of 61 nm centered at the wavelength of 1320 nm and the linewidth of the source is $0.014{\pm}0.002$ nm.

Novel Testing Method of CMOS Operation Amplifier using Offset Voltage (오프셋 전압을 이용한 CMOS 연산 증폭기의 새로운 테스팅 기법)

  • 한석붕;윤원효
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.507-510
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    • 1998
  • In this paper, a novel test method is proposed to detect hard and soft fault in CMOS operational amplifiers. Proposed test method mark use of the offset character, which is one of the op-amps characteristics. During the test mode, CUT is implemented to unit gain op-amps with feedback loop. When the input is grounded, a good circuit has a small offset voltage, but a faulty circuit has a large offset voltage exceeding predefined range of tolerance. Using the proposed method, no test vector is required to be applied. Therefore the test vector generation problem is eliminated and the test time is reduced. The accuracy and effectiveness of the method is verified through HSPICE simulation.

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