• 한국통신학회논문지
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• 제17권11호
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• pp.1290-1298
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• 1992

본 논문은 fitting 파라미터를 배제하고 2차원적 Poisson 방정식을 도출해서 short-channel MOSFET의 model 식을 완전히 해석적으로 성립시켰다. 이로 인해 포화영역, 문턱전압, 강반전에 대한 것이 동시에 표현되는 정확한 드레인 전류가 유도되었다. 더욱이 이 model은 short-channel과 body효과, DIBL효과, 그리고 carrier운동에 대한 것도 설명할 수 있으며 온도와 $n^+$접합, 산화층에 관련되는 문턱전압도 표현할 수 있었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.368-368
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• 2010

Using TFTs crystallized by MICC and ELA, electron mobility and threshold voltage were measured according to various substrate temperature from $-40^{\circ}C$ to $100^{\circ}C$. Basic curve, $V_G-I_D$, is also measured under various stress time from 1s to 10000s. Consequently, due to the passivation effect and number of grains, mobility of MICC is varied in the range of -8% ~ 7.6%, while that of ELA is varied from -11.04% ~ 13.25%. Also, since $V_G-I_D$ curve is dominantly affected by grain size, active layer interface, the graph remained steady under the various gate bias stress time from 1s to 10000s. This proves the point that MICC can be alternative technic to ELA.

• 한국전기전자재료학회논문지
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• 제26권5호
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• pp.373-379
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• 2013

Mg-doped zinc tin oxide (ZTO:Mg) thin films were prepared on glasses by rf magnetron sputtering. $O_2$ was introduced into the chamber during the sputtering. The optical properties of the films as a function of oxygen flow rate were studied. The crystal structure, elementary properties, and depth profiles of the films were investigated by X-ray diffraction (XRD), x-ray photoelectron spectroscopy (XPS), and secondary ion mass spectrometry (SIMS), respectively. Bottom-gate transparent thin film transistors were fabricated on $N^+$ Si wafers, and the variation of mobility, threshold voltage etc. with the oxygen flow rate were observed.

• Journal of Information Display
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• 제10권2호
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• pp.80-86
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• 2009

The variation of the electrical characteristics of thin-film transistors (TFTs) causes a non-uniform image quality problem, and the differential aging of organic light-emitting diode (OLED) devices causes an image-sticking problem. A video data correction method is proposed herein as an effective solution to the non-uniform electro-optical characteristics of the pixels in activematrix organic light-emitting diode (AMOLED) displays. The results of the simulation that was conducted show that the proposed method successfully senses the electrical characteristics of TFTs and the degradation of OLEDs and effectively compensates for them.

• Journal of information and communication convergence engineering
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• 제8권4호
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• pp.449-452
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• 2010

We have analyzed channel doping and dimensions(channel length, width and thickness) for the optimum subthreshold characteristics of DG(Double Gate) MOSFET based on the model of MicroTec 4.0. Since the DGMOSFET is the candidate device to shrink short channel effects, the determination of design rule for DGMOSFET is very important to develop sub-100nm devices for high speed and low power consumption. As device size scaled down, the controllability of dimensions and oxide thickness is very low. We have analyzed the short channel effects for the variation of channel dimensions, and found the design conditions of DGMOSFET having the optimum subthreshold characteristics for digital applications.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.534-536
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• 2009

We have fabricated solution-processed zinc-tin oxide thin film transistors (TFTs) and simple circuits on glass substrates. We report a solutionprocessed zinc-tin oxide TFTs on silicon wafer with mobility greater than 9 $cm^2/V{\cdot}s$ (W/L = 100/5 ${\mu}m$) and threshold voltage variation of less than 1 V after bias-stressing. Also, we fabricated solution-processed zinc-tin oxide circuits including inverters and 7-stage ring oscillators fabricated on glass substrates using the developed zinc-tin oxide TFTs.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 추계학술대회 논문집 전기물성,응용부문
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• pp.22-23
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• 2006

A new current-driving pixel circuit for active-matrix organic light-emitting diodes (AMOLEDs), composed of four organic thin-film transistors (OTFTs) and one capacitor, is proposed using a current scaling method. Designing pixel circuits with OTFTs has many problems due to the instability of the OTFT parameters with still unknown characteristics of the material. Despite the problems in using OTFTs to drive the pixel circuit, our work could be set as a goal for future OTFT development. The simulation results show enhanced linearity between input data and OLEO luminescence at low current levels as well as successfully compensating the variation of the OTFTs, such as the threshold voltage and mobility.

• 한국전기전자재료학회논문지
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• 제19권6호
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• pp.512-518
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• 2006

In this paper, we investigated the deposition of pentacene thin film on a large area substrate by Organic Vapor Phase Deposition(OVPD) and applied it to fabrication of Organic Thin Film Transistor(OTFT). We extracted the optimum deposition conditions such as evaporation temperature of $260^{\circ}C$, carrier gas flow rate of 10 sccm and chamber vacuum pressure of 0.1 torr. We fabricated 72 OTFTs on the 4 inch size Si Wafer, Which produced the average mobility of $0.1{\pm}0.021cm^2/V{\cdot}s$, average subthreshold slope of 1.04 dec/V, average threshold voltage of -6.55 V, and off-state current is $0.973pA/{\mu}m$. The overall performance of pentacene TFTs over 4 ' wafer exhibited the uniformity with the variation less than 20 %. This proves that OVPD is a suitable methode for the deposition of organic thin film over a large area substrate.

• E2M - 전기 전자와 첨단 소재
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• 제19권9호
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• pp.11-19
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• 2006

SLS crystallization and CMOS LTPS process have been developed for high performance and uniform characteristics. By strictly optimizing SLS optics in conventional 2 shot SLS process, threshold voltage variation of 720 pixel TFTs in 2.2-inch QVGA panel (240xRGB) was remarkably decreased from 1.89 V to 0.56 V of 3sigma value. Mobility of the channel doped NTFT and PTFT for circuits were $146\;and\;38cm^{2}/Vs$, respectively. Functional unit circuits for SOG were also fabricated and properly operated.

• 한국전기전자재료학회논문지
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• 제13권2호
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• pp.101-105
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• 2000

The effects of electrical on n-channel offset gated poly-Si TFT's have been investigated. It is observed that the electrical field near the drain region in offset devices is smaller than that of conventional device by simulation results. The variation rate of threshold voltage and subthreshold slope decrease with increasing the offset length because of lowering the electric field near the drain region. The offset gated poly-Si TFT's have been probed effective in reducing the degradation rate of device performance under electrical stressing.