• Title/Summary/Keyword: three-level

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Cancellation of Common-Mode Voltages in Three-Level NPC Inverters with Auxiliary Leg (3-레벨 NPC 인버터에서 보조 레그를 이용한 공통 모드 전압 제거)

  • Le, Quoe Anh;Le, Dong-Choon
    • Proceedings of the KIPE Conference
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    • 2016.07a
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    • pp.487-488
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    • 2016
  • In this paper, a new active circuit for common-mode voltage (CMV) cancellation in three-level NPC (neutral-point clamped) inverters is proposed, which can avoid the saturation of the common-mode transformer (CMT). The proposed circuit utilizes an additional three-level leg to produce the compensating CMV of the NPC inverters, which eliminates the CMV of the inverter through the CMT.

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Floating Power Supply Based on Bootstrap Operation for Three-Level Neutral-Point-Clamped Voltage-Source Inverter

  • Nguyen, Qui Tu Vo;Lee, Dong-Choon
    • Proceedings of the KIPE Conference
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    • 2011.11a
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    • pp.3-4
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    • 2011
  • This paper presents a survey of floating power supply based on bootstrap operation for three-level voltage-source inverters. The floating power supply for upper switches is achieved by the bootstrap capacitor charged during on-time of the switch underneath. Hence, a large number of bulky isolated DC/DC power supplies for each gate driver are reduced. The Pspice simulation results show the behavior of bootstrap devices and the performance of bootstrap capacitor voltage.

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The Three-Level PLA Design Using EXANOR (Mn-Zm-Fe Ferrite에서 하소 및 소결조건이 투자율과손실에 미치는 영향)

  • 조동섭;이종원;황희영
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.32 no.1
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    • pp.13-23
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    • 1983
  • This paper deals with the three-level PLA constructed by EXCLUSIVE-OR, AND, and OR. (abbreviated as EXANOR). Most PLA circuits have constraints on minimum chip area and minimal input lines. Thus, the reduction of PLA chip area is an important factor in design of logic circuits. In this paper, newly constructed architecture of PLA is proposed and then, its reduction effect is proved theoretically and some of selected examples are illustrated for designing three-level PLA circuits.

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Direct Torque Control of Induction Motor Fed by a Three Level Inverter (3 레벨 인버터를 이용한 유도 전동기의 직접 토크 제어)

  • 박영민;이세현;윤재학;박영우;김남해;이교범;송중호
    • Proceedings of the KIPE Conference
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    • 1999.07a
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    • pp.386-389
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    • 1999
  • In this paper a Direct Torque Control(DTC) scheme for PWM three level inverter-fed induction motor drives, is presented and discussed. In orde to deal with DTC scheme applied three level inverter, the selection of voltage vector is proposed to minimize switching frequency and torque ripple. The simulation results shows a validity of the control scheme.

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A Study on the loss Model and Characteristic Comparison of Three-Level Converter and Full-Bridge Converter through the Conduction loss Analysis of Power devices (전력용 반도체의 전도손실 분석을 통한 Three-Level 컨버터와 Full-Bridge 컨버터의 손실모델 및 특성비교에 관한 연구)

  • Bae, Jin-Yong;Kim, Yong;Kwon, Soon-Do;Lee, Eun-Young
    • Proceedings of the KIEE Conference
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    • 2004.04a
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    • pp.122-125
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    • 2004
  • This paper presents the loss analysis comparison for Three-Level Converter and Full-Bridge converter. The result of the analysis is verified with 2.5kW prototype.

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A Study on the Three-Level Converter using Primary Auxiliary Circuit (1차측 보조회로를 이용한 Three-Level 컨버터에 관한 연구)

  • Bae, Jin-Yong;Kim, Yong;Cho, Kyu-Man
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.6
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    • pp.972-981
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    • 2008
  • A New ZVS(Zero Voltage Switching) and ZVZCS(Zero Voltage and Zero Current Switching) Three-Level Converter is proposed. The proposed converter presented in this paper used a phase shift control with a flying capacitor in the primary side to achieve ZVS for the all switch. A primary auxiliary circuit, which consists of one coupled inductor, is added in the primary to provide ZVZCS conditions to primary switches. Many advantages including simple circuit topology high efficiency, and low cost make this converter attractive for high power applications. The principle of operation, feature and design considerations are illustrated and verified through the experiment with a 2kW(27V, 74A) 40 kHz IGBT based experimental circuit.

A Novel Three-Level ZVS PWM Inverter Topology for High-Voltage DC/DC Conversion Systems with Balanced Voltage Sharing and Wider Load Range (차단전압 균형과 넓은 부하범위를 갖는 새로운 3-레벨 ZVS PWM DC-DC 컨버터)

  • 송인호;유상봉;서범석;현동석
    • Proceedings of the KIPE Conference
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    • 1996.06a
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    • pp.71-75
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    • 1996
  • As the Three-level ZVS PWM DC-DC converter operates likewise full-bridge ZVS PWM DC-DC converter and the blocking voltage of each switching device is a half of the DC-link voltage, it is suitable for the high imput voltage applications. However, it has some problems as follows; The blocking voltage of each devices is unbalanced and it causes the power losses of the inner switching devices to be increased. Also, it has narrow load range so that the switching losses and the efficiency are reduced as it goes to the light load. This paper presents an nove Three-level ZVS PWM DC-DC converter, which can reduce the overvoltage of the outer switches, eliminate the unbalance of the voltage sharing between the switches at turn-off due to the stray inductances, and operate from no load to full load. The characteristics and the performances of the proposed Three-level ZVS PWM DC-DC converter are verified by simulation and experimental results

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