• The Korean Journal of Elementary Counseling
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• v.10 no.1
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• pp.39-56
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• 2011

The purpose of this study is to draw the elements of encouraging language from the literatures of encouragement and develop the encouraging language model for elementary school teachers. To achieve this, first of all, the literatures about the methods of encouragement were collected. And then the collected literatures were categorized according to the main concept which each literature contained. As a result, 5 categories and 17 subcategories were drawn. 5 categories were valuing a child as a human-being itself, trusting a child, thinking rationally about a child's mistakes, giving a feedback about a child's behaviors non-evaluatively, and reflecting a child's positive feeling. These 5 categories were established as the elements of encouraging language. The encouraging language model was developed on the bases of the 5 elements of encouraging language. The model was constructed of the examples of encouraging language in various classroom situations. The model contains various situations which elementary school teachers often confront in their classrooms. And the model shows the examples of encouraging language proper for each situation. Every example was constructed on the bases of the elements of encouraging language.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.15 no.4
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• pp.1409-1425
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• 2021

In wide-ranging information society, fast and easy access to information in language of one's choice is indispensable, which may be provided by using various multilingual Natural Language Processing (NLP) applications. Natural language text contains references among different language elements, called anaphoric links. Resolving anaphoric links is a key problem in NLP. Anaphora resolution is an essential part of NLP applications. Anaphoric links need to be properly interpreted for clear understanding of natural languages. For this purpose, a mechanism is desirable for the identification and resolution of these naturally occurring anaphoric links. In this paper, a framework based on Hobbs syntactic approach and a system developed by Lappin & Leass is proposed for resolution of reflexive anaphoric links, present in Urdu text documents. Generally, anaphora resolution process takes three main steps: identification of the anaphor, location of the candidate antecedent(s) and selection of the appropriate antecedent. The proposed framework is based on exploring the syntactic structure of reflexive anaphors to find out various features for constructing heuristic rules to develop an algorithm for resolving these anaphoric references. System takes Urdu text containing reflexive anaphors as input, and outputs Urdu text with resolved reflexive anaphoric links. Despite having scarcity of Urdu resources, our results are encouraging. The proposed framework can be utilized in multilingual NLP (m-NLP) applications.

• Korean Institute of Interior Design Journal
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• v.24 no.3
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• pp.113-120
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• 2015

Apartment is characterized by its various households occupying a unit each in the same building, and its shared space is important in that it supports the living, exchange of information and communication between neighbors, thereby creating a sense of community. This study focused on coming up with designs to vitalize the shared space in the apartment, and to do that, Christopher Alexander's pattern language was applied to analyze the patterns found in the apartment shared space, find improvements and propose the design methods that reflect the unique characteristics of designs in Korea. The study is mainly based on literary review and field research. (1) The definition and composition of shared space and Christopher Alexander's pattern language are examined; (2) The field research is performed to analyze the patterns in the shared space of the apartments that have been planned recently in order to find the problems and elements that can be improved; and The above is reflected and proposed as a design method. The study will help rediscover the significance of space by proposing the methodology for shared space design, encouraging the use of shared space and contributing to the enhancement of community.

• Journal of Korean language education
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• v.29 no.1
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• pp.109-137
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• 2018

The purpose of teacher education is to improve the professionalism of teachers above the current level. The type of teacher education to improve the professionalism of experienced teachers is broadly divided into top-down education and bottom-up education. So far, studies on top-down education were commonly conducted in the field of Korean language education. However, there has been an increasing number of studies emphasizing the need for bottom-up education, driven by the voluntary participation of teachers in recent years. The purpose of this study is to suggest the direction of reflective teacher education for experienced Korean language teachers. For this purpose, a survey was conducted of 71 Korean language teachers who had more than 5 years of experience. The contents of the survey consisted of opinions regarding existing teacher education, the need for reflective teacher education, and the perception of teaching professionalism. The results showed that experienced Korean language teachers had a positive perception of the existing teacher re-education experience. Also, 91% of the respondents said they intend to participate in the reflective teacher education program. In particular, respondents showed high demands for 'peer coaching', 'peer observation', and 'teaching portfolios' among reflective teacher education programs. Lastly, many respondents selected 'development and utilization of teaching materials', 'encouraging learner's utterances', and 'leading learner's interest and motivation' as sub-elements of teaching professionalism that they wish to improve through teacher re-education.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.975-976
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• 1993

This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}