• Title/Summary/Keyword: temporal associative memory

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On-line Associative Memory Design For Temporal Pattern Storage and Classification (시변패턴의 저장과 인식을 위한 On-line 연상 메모리의 설계)

  • Yeo, Seong-Won;Lee, Chong-Ho
    • Proceedings of the KIEE Conference
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    • 1996.07b
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    • pp.1395-1397
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    • 1996
  • Many of the existing neural associative memories are trained and recalled in separate modes and are not suitable for temporal pattern storage and classification in that user must specify the time and length of input patterns. In this paper, a new on-line temporal associative memory model is presented. This memory is structured in layers of neurons and each neuron has limited number of weights so that calculation complexity can be considerably reduced and processing of patterns can be achieved in real time.

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Fast NAND Flash Memory System for Instruction Code Execution

  • Jung, Bo-Sung;Kim, Cheong-Ghil;Lee, Jung-Hoon
    • ETRI Journal
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    • v.34 no.5
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    • pp.787-790
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    • 2012
  • The objective of this research is to design a high-performance NAND flash memory system containing a buffer system. The proposed instruction buffer in the NAND flash memory consists of two parts, that is, a fully associative temporal buffer for temporal locality and a fully associative spatial buffer for spatial locality. A spatial buffer with a large fetching size turns out to be effective for serial instructions, and a temporal buffer with a small fetching size is devised for branch instructions. Simulation shows that the average memory access time of the proposed system is better than that of other buffer systems with four times more space. The average miss ratio is improved by about 70% compared with that of other buffer systems.

Design of fault diagnostic system by using extended fuzzy cognitive map (확장된 퍼지인식맵을 이용한 고장진단 시스템의 설계)

  • 이쌍윤;김성호;주영훈
    • 제어로봇시스템학회:학술대회논문집
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    • 1997.10a
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    • pp.860-863
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    • 1997
  • FCM(Fuzzy Cognitive Map) is a fuzzy signed directed graph for representing causal reasoning which has fuzziness between causal concepts. Authors have already proposed FCM-based fault diagnostic scheme. However, the previously proposed scheme has the problem of lower diagnostic resolution. In order to improve the diagnostic resolution, a new diagnostic scheme based on extended FCM which incorporates the concept of fuzzy number into FCM is developed in this paper. Furthermore, an enhanced TAM(Temporal Associative Memory) recall procedure and pattern matching scheme are also proposed.

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High Performance Data Cache Memory Architecture (고성능 데이터 캐시 메모리 구조)

  • Kim, Hong-Sik;Kim, Cheong-Ghil
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.9 no.4
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    • pp.945-951
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    • 2008
  • In this paper, a new high performance data cache scheme that improves exploitation of both the spatial and temporal locality is proposed. The proposed data cache consists of a hardware prefetch unit and two sub-caches such as a direct-mapped (DM) cache with a large block size and a fully associative buffer with a small block size. Spatial locality is exploited by fetching and storing large blocks into a direct mapped cache, and is enhanced by prefetching a neighboring block when a DM cache hit occurs. Temporal locality is exploited by storing small blocks from the DM cache in the fully associative buffer according to their activity in the DM cache when they are replaced. Experimental results on Spec2000 programs show that the proposed scheme can reduce the average miss ratio by $12.53%\sim23.62%$ and the AMAT by $14.67%\sim18.60%$ compared to the previous schemes such as direct mapped cache, 4-way set associative cache and SMI(selective mode intelligent) cache[8].

The Instruction Flash memory system with the high performance dual buffer system (명령어 플래시 메모리를 위한 고성능 이중 버퍼 시스템 설계)

  • Jung, Bo-Sung;Lee, Jung-Hoon
    • Journal of the Korea Society of Computer and Information
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    • v.16 no.2
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    • pp.1-8
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    • 2011
  • NAND type Flash memory has performing much researches for a hard disk substitution due to its low power consumption, cheap prices and a large storage. Especially, the NAND type flash memory is using general buffer systems of a cache memory for improving overall system performance, but this has shown a tendency to emphasize in terms of data. So, our research is to design a high performance instruction NAND type flash memory structure by using a buffer system. The proposed buffer system in a NAND flash memory consists of two parts, i.e., a fully associative temporal buffer for branch instruction and a fully associative spatial buffer for spatial locality. The spatial buffer with a large fetching size turns out to be effective serial instructions, and the temporal buffer with a small fetching size can achieve effective branch instructions. According to the simulation results, we can reduce average miss ratios by around 77% and the average memory access time can achieve a similar performance compared with the 2-way, victim and fully associative buffer with two or four sizes.

The buffer Management system for reducing write/erase operations in NAND flash memory (NAND 플래시 메모리에서 쓰기/지우기 연산을 줄이기위한 버퍼 관리 시스템)

  • Jung, Bo-Sung;Lee, Jung-Hoon
    • Journal of the Korea Society of Computer and Information
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    • v.16 no.10
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    • pp.1-10
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    • 2011
  • There are the large overhead of block erase and page write operations in NAND flash memory, though it has low power consumption, cheap prices and a large storage. Due to the physical characteristics of NAND flash memory, overwrite operations are not permitted at the same location, so rewriting operation require after erase operation. it cause performance decrease of NAND flash memory. Using SRAM buffer in traditional NAND flash memory, it can not only reduce effective write operation but also guarantee fast memory access time. In this paper, we proposed the small SRAM buffer management system for reducing overhead of NAND flash memory, that is, erase and write operations. The proposed buffer system in a NAND flash memory consists of two parts, i.e., a fully associative temporal buffer with the small fetching block size and a fully associative spatial buffer with the large fetching block size. The temporal buffer have small fetching blocks that referenced from spatial buffer. When it happen write operations or erase operations in NAND flash memory, the related fetching blocks in temporal buffer include a page or a block are written in NAND flash memory at the same time. The writing and erasing counts in NAND flash memory can be reduced. According to the simulation results, although we have high miss ratios, write and erase operations can be reduced approximatively 58% and 83% respectively. Also the average memory access times are improved about 84% compared with the fully associative buffer with two sizes.

A Novel Model, Recurrent Fuzzy Associative Memory, for Recognizing Time-Series Patterns Contained Ambiguity and Its Application (모호성을 포함하고 있는 시계열 패턴인식을 위한 새로운 모델 RFAM과 그 응용)

  • Kim, Won;Lee, Joong-Jae;Kim, Gye-Young;Choi, Hyung-Il
    • The KIPS Transactions:PartB
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    • v.11B no.4
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    • pp.449-456
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    • 2004
  • This paper proposes a novel recognition model, a recurrent fuzzy associative memory(RFAM), for recognizing time-series patterns contained an ambiguity. RFAM is basically extended from FAM(Fuzzy Associative memory) by adding a recurrent layer which can be used to deal with sequential input patterns and to characterize their temporal relations. RFAM provides a Hebbian-style learning method which establishes the degree of association between input and output. The error back-propagation algorithm is also adopted to train the weights of the recurrent layer of RFAM. To evaluate the performance of the proposed model, we applied it to a word boundary detection problem of speech signal.

A New Flash Memory Package Structure with Intelligent Buffer System and Performance Evaluation (버퍼 시스템을 내장한 새로운 플래쉬 메모리 패키지 구조 및 성능 평가)

  • Lee Jung-Hoon;Kim Shin-Dug
    • Journal of KIISE:Computer Systems and Theory
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    • v.32 no.2
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    • pp.75-84
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    • 2005
  • This research is to design a high performance NAND-type flash memory package with a smart buffer cache that enhances the exploitation of spatial and temporal locality. The proposed buffer structure in a NAND flash memory package, called as a smart buffer cache, consists of three parts, i.e., a fully-associative victim buffer with a small block size, a fully-associative spatial buffer with a large block size, and a dynamic fetching unit. This new NAND-type flash memory package can achieve dramatically high performance and low power consumption comparing with any conventional NAND-type flash memory. Our results show that the NAND flash memory package with a smart buffer cache can reduce the miss ratio by around 70% and the average memory access time by around 67%, over the conventional NAND flash memory configuration. Also, the average miss ratio and average memory access time of the package module with smart buffer for a given buffer space (e.g., 3KB) can achieve better performance than package modules with a conventional direct-mapped buffer with eight times(e.g., 32KB) as much space and a fully-associative configuration with twice as much space(e.g., 8KB)

Fault Diagnostic System Based on Fuzzy Time Cognitive Map

  • Lee, Kee-Sang;Kim, Sung-Ho
    • Transactions on Control, Automation and Systems Engineering
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    • v.1 no.1
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    • pp.62-68
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    • 1999
  • FCM(Fuzzy Cognitive Map) is proposed for representing causal reasoning. Its structure allows systematic causal reasoning through a forward inference. Authors have already proposed a diagnostic system based on FCM to utilized to identify the true origin of fault by on-line pattern diagnosis. In FCM based fault diagnosis, Temporal Associative Memories (TAM) recall of FCM is utilized to identify the true origin of fault by on-line pattern match where predicted pattern sequences obtained from TAM recall of fault FCM models are compared with actually observed ones. In engineering processes, the propagation delays are induced by the dynamics of processes and may vary with variables involved. However, disregarding such propagation delays in FCM-based fault diagnosis may lead to erroneous diagnostic results. To solve the problem, a concept of FTCM(Fuzzy Time Cognitive Map) is introduced into FCM-based fault diagnosis in this work. Expecially, translation method of FTCM makes it possible to diagnose the fault for some discrete time. Simulation studies through two-tank system is carried out to verify the effectiveness of the proposed diagnostic scheme.

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Cache memory system for high performance CPU with 4GHz (4Ghz 고성능 CPU 위한 캐시 메모리 시스템)

  • Jung, Bo-Sung;Lee, Jung-Hoon
    • Journal of the Korea Society of Computer and Information
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    • v.18 no.2
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    • pp.1-8
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    • 2013
  • TIn this paper, we propose a high performance L1 cache structure on the high clock CPU of 4GHz. The proposed cache memory consists of three parts, i.e., a direct-mapped cache to support fast access time, a two-way set associative buffer to exploit temporal locality, and a buffer-select table. The most recently accessed data is stored in the direct-mapped cache. If a data has a high probability of a repeated reference, when the data is replaced from the direct-mapped cache, the data is selectively stored into the two-way set associative buffer. For the high performance and low power consumption, we propose an one way among two ways set associative buffer is selectively accessed based on the buffer-select table(BST). According to simulation results, Energy $^*$ Delay product can improve about 45%, 70% and 75% compared with a direct mapped cache, a four-way set associative cache, and a victim cache with two times more space respectively.