• 제목/요약/키워드: task failure

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Task failure resilience technique for improving the performance of MapReduce in Hadoop

  • Kavitha, C;Anita, X
    • ETRI Journal
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    • 제42권5호
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    • pp.748-760
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    • 2020
  • MapReduce is a framework that can process huge datasets in parallel and distributed computing environments. However, a single machine failure during the runtime of MapReduce tasks can increase completion time by 50%. MapReduce handles task failures by restarting the failed task and re-computing all input data from scratch, regardless of how much data had already been processed. To solve this issue, we need the computed key-value pairs to persist in a storage system to avoid re-computing them during the restarting process. In this paper, the task failure resilience (TFR) technique is proposed, which allows the execution of a failed task to continue from the point it was interrupted without having to redo all the work. Amazon ElastiCache for Redis is used as a non-volatile cache for the key-value pairs. We measured the performance of TFR by running different Hadoop benchmarking suites. TFR was implemented using the Hadoop software framework, and the experimental results showed significant performance improvements when compared with the performance of the default Hadoop implementation.

Job Characteristics in Nursing and Cognitive Failure at Work

  • Elfering, Achim;Grebner, Simone;Dudan, Anna
    • Safety and Health at Work
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    • 제2권2호
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    • pp.194-200
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    • 2011
  • Objectives: Stressors in nursing put high demands on cognitive control and, therefore, may increase the risk of cognitive failures that put patients at risk. Task-related stressors were expected to be positively associated with cognitive failure at work and job control was expected to be negatively associated with cognitive failure at work. Methods: Ninety-six registered nurses from 11 Swiss hospitals were investigated (89 women, 7 men, mean age = 36 years, standard deviation = 12 years, 80% supervisors, response rate 48%). A new German version of the Workplace Cognitive Failure Scale (WCFS) was employed to assess failure in memory function, failure in attention regulation, and failure in action exertion. In linear regression analyses, WCFS was related to work characteristics, neuroticism, and conscientiousness. Results: The German WCFS was valid and reliable. The factorial structure of the original WCF could be replicated. Multilevel regression task-related stressors and conscientiousness were significantly related to attention control and action exertion. Conclusion: The study sheds light on the association between job characteristics and work-related cognitive failure. These associations were unique, i.e. associations were shown even when individual differences in conscientiousness and neuroticism were controlled for. A job redesign in nursing should address task stressors.

Scalable Approach to Failure Analysis of High-Performance Computing Systems

  • Shawky, Doaa
    • ETRI Journal
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    • 제36권6호
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    • pp.1023-1031
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    • 2014
  • Failure analysis is necessary to clarify the root cause of a failure, predict the next time a failure may occur, and improve the performance and reliability of a system. However, it is not an easy task to analyze and interpret failure data, especially for complex systems. Usually, these data are represented using many attributes, and sometimes they are inconsistent and ambiguous. In this paper, we present a scalable approach for the analysis and interpretation of failure data of high-performance computing systems. The approach employs rough sets theory (RST) for this task. The application of RST to a large publicly available set of failure data highlights the main attributes responsible for the root cause of a failure. In addition, it is used to analyze other failure characteristics, such as time between failures, repair times, workload running on a failed node, and failure category. Experimental results show the scalability of the presented approach and its ability to reveal dependencies among different failure characteristics.

결함허용이 가능한 임베디드 실시간 태스크 관리 메커니즘 (Mechanism for Managing Fault-Tolerant Embedded Real-Time Tasks)

  • 정경훈;탁성우;김창수
    • 한국멀티미디어학회논문지
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    • 제10권7호
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    • pp.882-892
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    • 2007
  • 본 논문에서는 임베디드 실시간 운영체제 수준에서 주기적 및 비주기적 태스크 스케줄링뿐만 아니라 태스크들의 일시적인 결함을 복구할 수 있는 결함허용이 가능한 임베디드 실시간 태스크 관리 메커니즘을 제안한다. 기존의 임베디드 운영체제들은 주기적 및 비주기적 태스크들을 동시에 고려한 스케줄링 메커니즘을 지원하지 않는다. 그리고 태스크 결함 복구 메커니즘의 미지원으로 인해 결함 태스크로 인한 시스템 고장을 야기할 수도 있다. 제안된 결함허용 실시간 태스크 관리 메커니즘은 운영체제 수준에서 주기적 태스크들의 마감시한과 비주기적 태스크의 실행완료를 보장할 뿐만 아니라 일시적인 결함이 발생한 태스크를 복구함으로써 태스크 결함으로 인한 시스템 고장을 방지할 수 있다.

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선형회기분석을 이용한 고장분포 추정에 관한 연구 (Study on the Failure Distribution Estimation using Linear Regression Analysis)

  • 이강미;신덕호;백종현;이재호
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2008년도 하계종합학술대회
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    • pp.1109-1110
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    • 2008
  • It is required to optimize the system operation efficiency to allocate maintenance task and period using systemic maintenance process. To allocate maintenance task and period must analysis the failure distribution mode at first. In this paper, we introduce the linear regression analysis and estimate the failure distribution for the railroad signal equipment using that.

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하드 데드라인을 가지는 다중 실시간 주기적 태스크에서의 체크포인팅 기법 (Checkpoint Placement for Multiple Real-time Periodic Tasks with Hard Deadlines)

  • Kwak, Seong-Woo
    • 대한전기학회논문지:시스템및제어부문D
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    • 제53권8호
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    • pp.594-601
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    • 2004
  • We analyze checkpoint strategy for multiple real-time periodic tasks with hard deadlines. Real-time tasks usually have deadlines associated with them. For multiple real-time tasks, checkpoint strategy considering deadlines of all tasks is very difficult to derive. We analyze the problem of checkpoint placement for such multiple periodic tasks. In our strategy, the interval between checkpoints is determined for each task considering its deadline. An approximated failure probability over a specified interval is derived. Then the number of checkpoints for each task is selected to minimize the approximated failure probability. To show the usefulness of our strategy, error bound between the exact and the approximated failure probability is estimated, which is revealed to be quite small.

Task-Level Dynamic Voltage Scaling for Embedded System Design: Recent Theoretical Results

  • Kim, Tae-Whan
    • Journal of Computing Science and Engineering
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    • 제4권3호
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    • pp.189-206
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    • 2010
  • It is generally accepted that dynamic voltage scaling (DVS) is one of the most effective techniques of energy minimization for real-time applications in embedded system design. The effectiveness comes from the fact that the amount of energy consumption is quadractically proportional to the voltage applied to the processor. The penalty is the execution delay, which is linearly and inversely proportional to the voltage. According to the granularity of tasks to which voltage scaling is applied, the DVS problem is divided into two subproblems: inter-task DVS problem, in which the determination of the voltage is carried out on a task-by-task basis and the voltage assigned to the task is unchanged during the whole execution of the task, and intra-task DVS problem, in which the operating voltage of a task is dynamically adjusted according to the execution behavior to reflect the changes of the required number of cycles to finish the task before the deadline. Frequent voltage transitions may cause an adverse effect on energy minimization due to the increase of the overhead of transition time and energy. In addition, DVS needs to be carefully applied so that the dynamically varying chip temperature should not exceed a certain threshold because a drastic increase of chip temperature is highly likely to cause system function failure. This paper reviews representative works on the theoretical solutions to DVS problems regarding inter-task DVS, intra-task DVS, voltage transition, and thermal-aware DVS.

이중점화기법을 통해 본 남녀 대학생의 '성공/실패'에 대한 암묵적 표상 (A Study of College students' implicit representations of 'success/failure' by dual-priming task)

  • 조혜자 ;방희정 ;조숙자 ;김현정
    • 한국심리학회지 : 문화 및 사회문제
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    • 제14권1호
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    • pp.101-123
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    • 2008
  • 본 연구는 남녀 대학생을 대상으로, 어머니와 연합된 성공/실패에 대한 표상을 알아보기 위해 시도되었다. 이를 위해 연구 1에서는 어머니/바구니와 성공/실패를 이중점화자극으로 100ms 동안 제시하고 난 뒤, 150ms 후(SOA 250ms)에 수용/거부와 관련된 목표자극(probe)을 제시하고 어의판단에 걸리는 시간을 측정하였다. 그 결과, 어머니조건의 반응이 통제조건보다 빨랐으며, 수용에 대한 반응이 거부 반응보다 빨랐고, 여자집단의 반응이 남자보다 빨랐다. 연구 2에서는 남녀별로 애착 고집단과 저집단을 나누어, 어머니와 성공/실패를 이중점화시킨 뒤 수용/거부에 대한 어의판단 시간을 측정하였다. 그 결과, 성공/실패와 수용/거부 간에 상호작용이 나타나, 성공-수용에 대한 반응은 가장 빨랐고, 실패-수용, 실패-거부, 성공-거부의 순으로 반응이 느려졌다. 한편 남자집단에서는 애착고저 집단 간에 유의미한 차이가 없고 상호작용도 나타나지 않았지만, 여자집단에서는 3원 상호작용이 나타났다. 즉 여자 애착 고집단에서는 성공-수용, 성공-거부에 대한 반응차이가 크지 않았고, 실패-거부에 대한 반응이 매우 느렸으나, 여자 애착 저집단에서는 성공-수용은 매우 빠른데 비해 성공-거부는 매우 느렸다. 이러한 결과는 자기 긍정성 및 성별, 애착유형에 따라 다른 성공/실패 도식과 관련하여 논의되었다.

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설계의 안전성 검토(DFS) 업무의 효율성 증대를 위한 공동주택 건설공사의 단위작업별 재해위험성 평가 (Disaster Risk Assessment by Work Unit of Construction Work for Improve the Efficiency of Design for Safety Task)

  • 김진원;김재준
    • 대한건축학회논문집:구조계
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    • 제34권6호
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    • pp.45-53
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    • 2018
  • The construction work to establish a safety management plan should be carried out Design for Safety(DFS) task by the designers from May 2016 according to the amendment of the Construction Technology Promotion Act. However, designers lack experience in construction work and lack of information on safety accidents, so it is not easy to predict a disaster that may occur during the construction phase. Therefore, the purpose of this study is to provide information about disasters that can occur in each construction work in order to enable designers to efficiently perform DFS task in the design phase. In this study, the construction work was classified by work unit and the disaster risk assessment was conducted using the Failure Mode and Effect Analysis technique. The disaster information by work unit analyzed in this study can be used to provide designers with an alternative to prevent disasters at the design stage. Disaster information by work unit of apartment construction can be used by designers to prepare an alternative for disaster prevention at the design stage.

Stress Estimation of a Drain Current in Sub-threshold regime of amorphous Si:H

  • Lee, Do-Young;Lee, Kyung-Ho
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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    • pp.1172-1175
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    • 2007
  • We have investigated the threshold voltage shifts(${\Delta}Vth$) and drain current level shift (${\Delta}Ids$) in subthreshold region of a-Si:H TFTs induced by DC Bias (Vgs and Vds) - Temperature stress (BTS) condition. We plotted the transfer curves and the ${\Delta}Vth$ contour maps as Vds-Vds stress bias and Temperature to examine the severe damage cases on TFTs. Also, by drawing out the time-dependent transfer curve (Ids-Vgs) in the region of $10^{-8}\;{\sim}\;10^{-13}$ (A) current level, we can estimate the failure time of TFTs in a operating condition.

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