• Title/Summary/Keyword: task failure

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Task failure resilience technique for improving the performance of MapReduce in Hadoop

  • Kavitha, C;Anita, X
    • ETRI Journal
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    • v.42 no.5
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    • pp.748-760
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    • 2020
  • MapReduce is a framework that can process huge datasets in parallel and distributed computing environments. However, a single machine failure during the runtime of MapReduce tasks can increase completion time by 50%. MapReduce handles task failures by restarting the failed task and re-computing all input data from scratch, regardless of how much data had already been processed. To solve this issue, we need the computed key-value pairs to persist in a storage system to avoid re-computing them during the restarting process. In this paper, the task failure resilience (TFR) technique is proposed, which allows the execution of a failed task to continue from the point it was interrupted without having to redo all the work. Amazon ElastiCache for Redis is used as a non-volatile cache for the key-value pairs. We measured the performance of TFR by running different Hadoop benchmarking suites. TFR was implemented using the Hadoop software framework, and the experimental results showed significant performance improvements when compared with the performance of the default Hadoop implementation.

Job Characteristics in Nursing and Cognitive Failure at Work

  • Elfering, Achim;Grebner, Simone;Dudan, Anna
    • Safety and Health at Work
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    • v.2 no.2
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    • pp.194-200
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    • 2011
  • Objectives: Stressors in nursing put high demands on cognitive control and, therefore, may increase the risk of cognitive failures that put patients at risk. Task-related stressors were expected to be positively associated with cognitive failure at work and job control was expected to be negatively associated with cognitive failure at work. Methods: Ninety-six registered nurses from 11 Swiss hospitals were investigated (89 women, 7 men, mean age = 36 years, standard deviation = 12 years, 80% supervisors, response rate 48%). A new German version of the Workplace Cognitive Failure Scale (WCFS) was employed to assess failure in memory function, failure in attention regulation, and failure in action exertion. In linear regression analyses, WCFS was related to work characteristics, neuroticism, and conscientiousness. Results: The German WCFS was valid and reliable. The factorial structure of the original WCF could be replicated. Multilevel regression task-related stressors and conscientiousness were significantly related to attention control and action exertion. Conclusion: The study sheds light on the association between job characteristics and work-related cognitive failure. These associations were unique, i.e. associations were shown even when individual differences in conscientiousness and neuroticism were controlled for. A job redesign in nursing should address task stressors.

Scalable Approach to Failure Analysis of High-Performance Computing Systems

  • Shawky, Doaa
    • ETRI Journal
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    • v.36 no.6
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    • pp.1023-1031
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    • 2014
  • Failure analysis is necessary to clarify the root cause of a failure, predict the next time a failure may occur, and improve the performance and reliability of a system. However, it is not an easy task to analyze and interpret failure data, especially for complex systems. Usually, these data are represented using many attributes, and sometimes they are inconsistent and ambiguous. In this paper, we present a scalable approach for the analysis and interpretation of failure data of high-performance computing systems. The approach employs rough sets theory (RST) for this task. The application of RST to a large publicly available set of failure data highlights the main attributes responsible for the root cause of a failure. In addition, it is used to analyze other failure characteristics, such as time between failures, repair times, workload running on a failed node, and failure category. Experimental results show the scalability of the presented approach and its ability to reveal dependencies among different failure characteristics.

Mechanism for Managing Fault-Tolerant Embedded Real-Time Tasks (결함허용이 가능한 임베디드 실시간 태스크 관리 메커니즘)

  • Jung, Kyung-Hoon;Tak, Sung-Woo;Kim, Chang-Soo
    • Journal of Korea Multimedia Society
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    • v.10 no.7
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    • pp.882-892
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    • 2007
  • In this paper, we propose a mechanism for both scheduling the hybrid-task set which consists of periodic and aperiodic tasks and recovering tasks with transient faults on the level of the operating system. Existing embedded operating systems would not provide the scheduling of both periodic and aperiodic tasks. Also because of not supporting the recovery of task failures, they can not prevent system failure from transient task faults. Proposed method, on the level of operating system, is able to not only meet the deadlines of all periodic tasks but also complete the execution of aperiodic tasks. In addition, it is able to prevent the system failure from transient task faults by recovering the task faults.

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Study on the Failure Distribution Estimation using Linear Regression Analysis (선형회기분석을 이용한 고장분포 추정에 관한 연구)

  • Lee, Kang-Mi;Shin, Duc-Ko;Baek, Jong-Hyun;Lee, Jae-Ho
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.1109-1110
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    • 2008
  • It is required to optimize the system operation efficiency to allocate maintenance task and period using systemic maintenance process. To allocate maintenance task and period must analysis the failure distribution mode at first. In this paper, we introduce the linear regression analysis and estimate the failure distribution for the railroad signal equipment using that.

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Checkpoint Placement for Multiple Real-time Periodic Tasks with Hard Deadlines (하드 데드라인을 가지는 다중 실시간 주기적 태스크에서의 체크포인팅 기법)

  • Kwak, Seong-Woo
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.53 no.8
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    • pp.594-601
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    • 2004
  • We analyze checkpoint strategy for multiple real-time periodic tasks with hard deadlines. Real-time tasks usually have deadlines associated with them. For multiple real-time tasks, checkpoint strategy considering deadlines of all tasks is very difficult to derive. We analyze the problem of checkpoint placement for such multiple periodic tasks. In our strategy, the interval between checkpoints is determined for each task considering its deadline. An approximated failure probability over a specified interval is derived. Then the number of checkpoints for each task is selected to minimize the approximated failure probability. To show the usefulness of our strategy, error bound between the exact and the approximated failure probability is estimated, which is revealed to be quite small.

Task-Level Dynamic Voltage Scaling for Embedded System Design: Recent Theoretical Results

  • Kim, Tae-Whan
    • Journal of Computing Science and Engineering
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    • v.4 no.3
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    • pp.189-206
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    • 2010
  • It is generally accepted that dynamic voltage scaling (DVS) is one of the most effective techniques of energy minimization for real-time applications in embedded system design. The effectiveness comes from the fact that the amount of energy consumption is quadractically proportional to the voltage applied to the processor. The penalty is the execution delay, which is linearly and inversely proportional to the voltage. According to the granularity of tasks to which voltage scaling is applied, the DVS problem is divided into two subproblems: inter-task DVS problem, in which the determination of the voltage is carried out on a task-by-task basis and the voltage assigned to the task is unchanged during the whole execution of the task, and intra-task DVS problem, in which the operating voltage of a task is dynamically adjusted according to the execution behavior to reflect the changes of the required number of cycles to finish the task before the deadline. Frequent voltage transitions may cause an adverse effect on energy minimization due to the increase of the overhead of transition time and energy. In addition, DVS needs to be carefully applied so that the dynamically varying chip temperature should not exceed a certain threshold because a drastic increase of chip temperature is highly likely to cause system function failure. This paper reviews representative works on the theoretical solutions to DVS problems regarding inter-task DVS, intra-task DVS, voltage transition, and thermal-aware DVS.

A Study of College students' implicit representations of 'success/failure' by dual-priming task (이중점화기법을 통해 본 남녀 대학생의 '성공/실패'에 대한 암묵적 표상)

  • Hyeja Cho ;Hee Jeong Bang ;Sook Ja Cho ;Hyun Jeong Kim
    • Korean Journal of Culture and Social Issue
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    • v.14 no.1
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    • pp.101-123
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    • 2008
  • We investigated the implicit representations of success/failure associated with mother in male and female college students. In study 1, participants were presented 'mother' or 'basket' as a context prime and 'success' or 'failure' related words as second primes for 100ms, and were asked to make lexical decisions about 'accept' or 'reject' related words and non-words after 150 ms (SOA 250ms). Results revealed that lexical decision times on the mother condition were more rapid than the ones on the basket condition, and lexical decision times on the acceptance condition were more rapid than the ones on the rejection condition, and female participants showed shorter times than male students did. In study 2, we divided participants into four groups by gender and attachment style, Results showed that the interaction between success/failure and acceptance/rejection was statistically significant, that is, quickest lexical decision times on the success-acceptance condition, and slowed times on failure-acceptance, failure-rejection, and success-rejection condition in order. On the other hand, no significant differences between high and low attachment group were found in males, but significant three-way interactions were found in females. In highly attached females, lexical decision times in success-acceptance condition were not differed from ones in success-rejection condition, and slowed times in failure-rejection condition. Low attached females showed very rapid times in success-acceptance condition, but very slow times in success-rejection condition. The results were discussed in terms of self-positivity and success/failure scheme depending on gender and attachment styles.

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Disaster Risk Assessment by Work Unit of Construction Work for Improve the Efficiency of Design for Safety Task (설계의 안전성 검토(DFS) 업무의 효율성 증대를 위한 공동주택 건설공사의 단위작업별 재해위험성 평가)

  • Kim, Jin-Won;Kim, Jae-Jun
    • Journal of the Architectural Institute of Korea Structure & Construction
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    • v.34 no.6
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    • pp.45-53
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    • 2018
  • The construction work to establish a safety management plan should be carried out Design for Safety(DFS) task by the designers from May 2016 according to the amendment of the Construction Technology Promotion Act. However, designers lack experience in construction work and lack of information on safety accidents, so it is not easy to predict a disaster that may occur during the construction phase. Therefore, the purpose of this study is to provide information about disasters that can occur in each construction work in order to enable designers to efficiently perform DFS task in the design phase. In this study, the construction work was classified by work unit and the disaster risk assessment was conducted using the Failure Mode and Effect Analysis technique. The disaster information by work unit analyzed in this study can be used to provide designers with an alternative to prevent disasters at the design stage. Disaster information by work unit of apartment construction can be used by designers to prepare an alternative for disaster prevention at the design stage.

Stress Estimation of a Drain Current in Sub-threshold regime of amorphous Si:H

  • Lee, Do-Young;Lee, Kyung-Ho
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1172-1175
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    • 2007
  • We have investigated the threshold voltage shifts(${\Delta}Vth$) and drain current level shift (${\Delta}Ids$) in subthreshold region of a-Si:H TFTs induced by DC Bias (Vgs and Vds) - Temperature stress (BTS) condition. We plotted the transfer curves and the ${\Delta}Vth$ contour maps as Vds-Vds stress bias and Temperature to examine the severe damage cases on TFTs. Also, by drawing out the time-dependent transfer curve (Ids-Vgs) in the region of $10^{-8}\;{\sim}\;10^{-13}$ (A) current level, we can estimate the failure time of TFTs in a operating condition.

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