• 제목/요약/키워드: synchronous algorithm

검색결과 672건 처리시간 0.027초

공기압 실린더 구동 장치의 위치 동기 제어 (Synchronous Position Control of Pneumatic Cylinder Driving Apparatus)

  • 장지성
    • 대한기계학회논문집A
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    • 제28권9호
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    • pp.1415-1421
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    • 2004
  • In this study, a position synchronous control algorithm applied to two-axes pneumatic cylinder driving apparatus is proposed. The position synchronous control algorithm is composed of position controller and synchronous controller. The position controller is designed to minimize the effect of several nonlinear characteristics peculiar to the pneumatic cylinder driving apparatus on position control performance. The synchronous controller is designed to reduce the synchronous error. The effectiveness of the proposed control algorithm is proved by experimental results.

2축 공기압 실린더 구동장치의 위치 동기 제어 (Position Synchronous Control of Two Axes Pneumatic Cylinder Driving Apparatus)

  • 장지성
    • 동력기계공학회지
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    • 제8권4호
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    • pp.24-30
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    • 2004
  • In this study, a position synchronous control algorithm applied to two-axes pneumatic cylinder driving apparatus is proposed. The position synchronous control algorithm is composed of position controller and synchronous controller. The position controller is designed to minimize the effect of several nonlinear characteristics peculiar to the pneumatic cylinder driving apparatus on position control performance. The synchronous controller is designed to reduce the synchronous error. The effectiveness of the proposed controller is proved by simulation results.

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공기압 실린더 구동 장치의 위치 동기 제어 (Synchronous Position Control of Pneumatic Cylinder Driving Apparatus)

  • 장지성
    • 대한기계학회:학술대회논문집
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    • 대한기계학회 2004년도 춘계학술대회
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    • pp.762-767
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    • 2004
  • In this study, a position synchronous control algorithm being applied to two-axes pneumatic cylinder driving apparatus is proposed. The position synchronous control algorithm is composed of position controller and synchronous controller. The position controller is designed to minimize the effect of several nonlinear characteristics of the driving apparatus. The synchronous controller is designed to reduce the synchronous error. The effectiveness of the proposed controller is proved by simulation results.

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ATM 망에서 멀티미디어 동기화를 위한 DLB 기법 (The DLB Method for Multimedia Synchronization in the ATM Networks)

  • 구경옥;이병수;조용환
    • 한국통신학회논문지
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    • 제22권4호
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    • pp.842-854
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    • 1997
  • 본 연구에서는 멀티미디어 데이터의 동기 셀 손실율을 줄이기 위해 개선된 Dual Leaky-Bucket 알고리즘을 제안하였다. 기존의 DLB 알고리즘은 동기셀에 대하여 어떠한 지원도 하지 않았으나 제안 알고리즘은 동기셀에 높은 우선순위를 부여한다. 본 연구에서는 동기셀의 손실율을 줄이기 위해 동기셀 검출기를 사용하였다. 동기셀 검출기는 수신셀을 검사하여 동기셀이며 1단계 Leaky-Bucket을 거치지 않고 바로 2단게 Leaky-Bucket으로 전달하게 된다. 이것은 동기셀에 우선순위를 주는 것과 유사한 효과를 보인다. On/Off와 Two-state MMPP로 모델링한 Audio와 Video 트래픽을 SLAM II 시뮬레이션 팩키지를 통해 시뮬레이션 한 결과 제안 알고리즘이 기존 알고리즘에 비하여 낮은 동기셀 손실율을 얻을 수 있음을 보였다. 멀티미디어 동기화를 위하여 개선된 DLB 알고리즘은 높은 우선순위를 요구하는 다른 임의의 셀에 대해서도 확장되어 적용할 수 있다.

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동적 우선순위 제어방식을 사용한 ATM 스위치의 성능분석 (Performance Analysis of ATM Switch Using Dynamic Priority Control Mechanisms)

  • 박원기
    • 한국통신학회논문지
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    • 제22권4호
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    • pp.855-869
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    • 1997
  • In this paper, we proposed two kids of dynamic priority control mechanisms controlling the cell service ratio in order to improve the QOS(Quality of Service). We also analyse theoretically the characteristics of cell loss probability and mean cell delay time by applying the proposed priority control mechanisms to ATM switch with output buffer. The proposed priority control mechanisms have the same principles of storing cells into buffer but the different principles of serving cells from buffer. The one is the control mechanism controlling the cell service ratio according to the relative cell occupancy ratio of buffer, the other is the control mechanism controlling the cell service ratio according to both the relative cell occupancy ratio of buffer and the average arrival rate. The two service classes of our concern are the delay sensitive class and the loss sensitive class. The analytical results show that the proposed control mechanisms are able to improve the QOS, the characteristics of cell loss probability and mean cell delay time, by selecting properly the relative cell occupancy ratio of buffer and the average arrival rate. conventional DLB algorithm does not support synchronous cells, but the proposed algorithm gives higher priority to synchronous cells. To reduce synchronous cell loss rate, the synchronous cell detector is used in the proposed algorithm. Synchronous cell detector detects synchronous cells, and passes them cells to the 2nd Leaky-Bucket. So it is similar to give higher priority to synchronous cells. In this paper, the proposed algorithm used audio/video traffic modeled by On/Off and Two-state MMPP, and simulated by SLAM II package. As simulation results, the proposed algorithm gets lower synchronous cell loss rate than the conventional DLB algorithms. The improved DLB algorithm for multimedia synchronization can be extended to any other cells which require higher priority.

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Dynamic Synchronous Phasor Measurement Algorithm Based on Compressed Sensing

  • Yu, Huanan;Li, Yongxin;Du, Yao
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제14권1호
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    • pp.53-76
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    • 2020
  • The synchronous phasor measurement algorithm is the core content of the phasor measurement unit. This manuscript proposes a dynamic synchronous phasor measurement algorithm based on compressed sensing theory. First, a dynamic signal model based on the Taylor series was established. The dynamic power signal was preprocessed using a least mean square error adaptive filter to eliminate interference from noise and harmonic components. A Chirplet overcomplete dictionary was then designed to realize a sparse representation. A reduction of the signal dimension was next achieved using a Gaussian observation matrix. Finally, the improved orthogonal matching pursuit algorithm was used to realize the sparse decomposition of the signal to be detected, the amplitude and phase of the original power signal were estimated according to the best matching atomic parameters, and the total vector error index was used for an error evaluation. Chroma 61511 was used for the output of various signals, the simulation results of which show that the proposed algorithm cannot only effectively filter out interference signals, it also achieves a better dynamic response performance and stability compared with a traditional DFT algorithm and the improved DFT synchronous phasor measurement algorithm, and the phasor measurement accuracy of the signal is greatly improved. In practical applications, the hardware costs of the system can be further reduced.

Optimization of PI Controller Gain for Simplified Vector Control on PMSM Using Genetic Algorithm

  • Jeong, Seok-Kwon;Wibowo, Wahyu Kunto
    • 동력기계공학회지
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    • 제17권5호
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    • pp.86-93
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    • 2013
  • This paper proposes the used of genetic algorithm for optimizing PI controller and describes the dynamic modeling simulation for the permanent magnet synchronous motor driven by simplified vector control with the aid of MATLAB-Simulink environment. Furthermore, three kinds of error criterion minimization, integral absolute error, integral square error, and integral time absolute error, are used as objective function in the genetic algorithm. The modeling procedures and simulation results are described and presented in this paper. Computer simulation results indicate that the genetic algorithm was able to optimize the PI controller and gives good control performance of the system. Moreover, simplified vector control on permanent magnet synchronous motor does not need to regulate the direct axis component current. This makes simplified vector control of the permanent magnet synchronous motor very useful for some special applications that need simple control structure and low cost performance.

Parameter Identification of a Synchronous Reluctance Motor by using a Synchronous PI Current Regulator at a Standstill

  • Hwang, Seon-Hwan;Kim, Jang-Mok;Khang, Huynh Van;Ahn, Jin-Woo
    • Journal of Power Electronics
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    • 제10권5호
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    • pp.491-497
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    • 2010
  • This paper proposes an estimation algorithm for the electrical parameters of synchronous reluctance motors (SynRMs) by using a synchronous PI current regulator at standstill. In reality, the electrical parameters are only measured or estimated in limited conditions without fully considering the effects of the switching devices, connecting wires, and magnetic saturation. As a result, the acquired electrical parameters are different from the real parameters of the motor drive system. In this paper, the effects of switching devices, connecting wires, and the magnetic saturation are considered by simultaneously using the short pulse and closed loop equations of resistance and synchronous inductances. Therefore, the proposed algorithm can be easily and safely implemented with a reduced measuring time. In addition, it does not need any external or additional measurement equipment, information on the motor's dimensions, and material characteristics as in the case of FEM. Several experimental results verify the effectiveness of the proposed algorithm.

SFC를 이용한 약계자 영역에서 가스터빈용 동기 전동기의 기동 알고리즘에 관한 연구 (A Study on Starting Algorithm of Large Synchronous Motor for Gas Turbine in Field-Weakening Region using SFC)

  • 유호선;이주현;강윤종;황선환;김장목
    • 전력전자학회논문지
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    • 제13권6호
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    • pp.411-419
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    • 2008
  • 대용량 동기 발전/전동기 기동운전에는 주로 사이리스터를 이용한 정지형 주파수 변환 장치(SFC : Static Frequency Converter)시스템이 널리 사용되고 있다. 지금까지의 국내 SFC에 대한 연구는 주로 양수 발전 시스템에 관한 연구가 주류를 이루고 있어 가스터빈용 SFC 시스템에 관한 구체적인 기동 알고리즘에 관한 연구는 미흡한 실정이다. 따라서 본 논문에서는 PI 전류 제어기의 안티 와인드업 출력 신호를 이용한 가스터빈 동기 전동기의 기동을 위한 새로운 약계자 제어 알고리즘을 제안하였으며 이에 대한 실효성과 타당성을 실험을 통해 검증하였다.

분산 시스템에서 고장 추적 장치를 이용한 선출 알고리즘 (An Election Algorithm with Failure Detectors in Distributed Systems)

  • 박성훈
    • 한국콘텐츠학회논문지
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    • 제8권2호
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    • pp.9-17
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    • 2008
  • 본 논문에서는 동기적인 분산시스템에서 불리 알고리즘에 기초하여 하나의 새로운 선출(election) 알고리즘을 설계하고 이를 분석하고자 한다. 동기적인 분산시스템에서 기존의 불리 알고리즘은 고장 추적 장치를 이용하여 더욱 효율적으로 설계되고 구현 될 수 있음을 보인다.