• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.5
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• pp.1-12
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• 1999

A new algorithm of constructing binary decision diagram(BDD) for design verification of switch-level circuits is proposed in this paper. In the switch-level circuit, functions are characterized by serial and parallel connections of switches and the final logic values may have high-impedance and unstable states in addition to the logic values of 0 and 1. We extend the BDD to represent functions of switch-level circuits as acyclic graphs so called switch-level binary decision diagram (SLBDD). The function representation of the graph is in the worst case, exponential to the number of inputs. Thus, the ordering of decision variables plays a major role in graph sizes. Under the existence of pass-transistors and domino-logic of precharging circuitry, we also propose an input ordering algorithm for the efficiency in graph sizes. We conducted several experiments on various benchmark circuits and the results show that our algorithm is efficient enough to apply to functional simulation, power estimation, and fault-simulation of switch-level design.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.47 no.4
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• pp.102-108
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• 2010

The photovoltaic system changes solar energy into DC by solar cell and this DC is inverted into AC which is used in general houses by inverter. Recently, the use of power of the photovoltaic system is increased. Therefore, the study of 3 phase solar system to transmit large power is very important. This paper proposes a method that finds simply faults and diagnoses the switch open faults of 3-phase pulse width modulation (PWM) inverter of grid-connected photovoltaic system. The proposed method in $\alpha\beta$ plane uses the patterns of trajectory image as the characteristic parameters and differenciates a normal state and open states of switches. Then, the result is made into tree. The tree is composed of 21 fault patterns and the parameters to classify faults are a shape, a trajectory area, a distributed angle, and a typical vector angle. The result shows that the proposed method diagnosed fault diagnoses, classified correctly them, and made a pattern tree by fault patterns.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.1
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• pp.166-173
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• 2013

As the number of IPs and the communication volume among them have constantly increased, on-chip crossbar network is now the most widely-used on-chip communication backbone of contemporary SoCs. The on-chip crossbar network consists of multiple crossbars and the connections among the IPs and the crossbars. As the complexity of SoCs increases, it has also become more and more complex to determine the topology of the crossbar network. To tackle this problem, this paper proposes an on-chip crossbar network topology method for application-specific systems. The proposed method uses mixed integer linear programming to solve the topology synthesis problem, thus the global optimality is guaranteed. Unlike the previous MILP-based methods which represent the topology with adjacency matrixes of IPs and crossbar switches, the proposed method uses the communication edges among IPs as the basic element of the representation. The experimental results show that the proposed MILP formulation outperforms the previous one by improving the synthesis speed by 77.1 times on average, for 4 realistic benchmarks.

• Journal of IKEEE
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• v.11 no.1 s.20
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• pp.69-76
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• 2007

This paper presents the design of LVDS (Low-Voltage-Differential-Signaling) transmitter for Gb/s-per-pin operation. The proposed LVDS transmitter is designed using BiCMOS technology, which can be compatible with CMOS technology. To reduce chip area and enhance the robustness of LVDS transmitter, the MOS switches of transmitter are replaced with lateral bipolar transistor. The common emitter current gain($\beta$) of designed bipolar transistor is 20 and the cell size of LVDS transmitter is $0.01mm^2$. Also the proposed LVDS driver is operated at 1.8V and the maximum data rate is 2.8Gb/s approximately In addition, a novel ESD protection circuit is designed to protect the ESD phenomenon. This structure has low latch-up phenomenon by using turn on/off character of P-channel MOSFET and low triggering voltage by N-channel MOSFET in the SCR structure. The triggering voltage and holding voltage are simulated to 2.2V, 1.1V respectively.

• The Journal of Advanced Prosthodontics
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• v.5 no.3
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• pp.262-269
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• 2013

PURPOSE. Perceived color of ceramics changes by the spectral power distribution of ambient light. This study aimed to quantify the amount of shifts in color and color coordinates of clinically simulated seven all-ceramics due to the switch of three ambient light sources using a human vision simulating spectroradiometer. MATERIALS AND METHODS. CIE color coordinates, such as $L^*$, $a^*$ and $b^*$, of ceramic specimens were measured under three light sources, which simulate the CIE standard illuminant D65 (daylight), A (incandescent lamp), and F9 (fluorescent lamp). Shifts in color and color coordinate by the switch of lights were determined. Influence of the switched light (D65 to A, or D65 to F9), shade of veneer ceramics (A2 or A3), and brand of ceramics on the shifts was analyzed by a three-way ANOVA. RESULTS. Shifts in color and color coordinates were influenced by three factors (P<.05). Color shifts by the switch to A were in the range of 5.9 to 7.7 ${\Delta}E{^*}_{ab}$ units, and those by the switch to F9 were 7.7 to 10.2; all of which were unacceptable (${\Delta}E{^*}_{ab}$ > 5.5). When switched to A, CIE $a^*$ increased (${\Delta}a^*$: 5.6 to 7.6), however, CIE $b^*$ increased (${\Delta}b^*$: 4.9 to 7.8) when switched to F9. CONCLUSION. Clinically simulated ceramics demonstrated clinically unacceptable color shifts according to the switches in ambient lights based on spectroradiometric readings. Therefore, shade matching and compatibility evaluation should be performed considering ambient lighting conditions and should be done under most relevant lighting condition.

• Journal of Ocean Engineering and Technology
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• v.24 no.1
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• pp.166-171
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• 2010

In this paper, the front-end of a digital receiver with a 25 kHz carrier frequency, 5 kHz symbol rate, and any excess-bandwidth is designed using two basic facts. The first is known as the uniform sampling theorem, which states that the sampled sequence might not suffer from aliasing even if its sampling rate is lower than the Nyquist sampling rate if the analog signal is a bandpass one. The other fact is that if the sampling rate is 4 times the center frequency of the sampled sequence, the front-end processing complexity can be dramatically reduced due to the half of the sampled sequence to be multiplied by zero in the demixing process. Furthermore, the designed front-end is simplified by introducing sub-filters and sub-sampling sequences. The designed front-end is composed of an A/D converter, which takes samples of a bandpass filtered signal at a 20 kHz rate; a serial-to-parallel converter, which converts a sampled bandpass sequence to 4 parallel sub-sample sequences; 4 sub-filter blocks, which act as a frequency shifter and lowpass filter for a complex sequence; 4 synchronized switches; and 2 adders. The designed front-end dramatically reduces the computational complexity by more than 50% for frequency shifting and lowpass filtering operations since a conventional front-end requires a frequency shifting and two lowpass filtering operations to get one lowpass complex sample, while the proposed front-end requires only four filtering operation to get four lowpass complex samples, which is equivalent to one filtering operation for one sample.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.4
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• pp.479-486
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• 1999

In this paper the system performance degradation resulting from nonlinear transmitter power amplifier which is essential to increase the efficiency is analyzed in a forward link CDMA system. The power amplifier is modeled by power series model which includes only odd-order terms. The effects of power amplifier's nonlinearity such as intersymbol interference, phase distortion on the RF system performance were visualized by examining the distorted time domain waveforms, signal vector constellation. And through the investigation of the power spectrum density of the transmitted signal, spectral regrowth or sideband regrowth which is result from amplitude distortion can be seen. All these characteristics result in BER performance degradation due to other user interferences and intersymbol interference. The analysis technique described here applies not only to power amplifier but also to any other nonlinear components such as mixers and switches. Also the effects of adjacent channel interference and supurious emission can be analysed between different systems.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.4
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• pp.401-410
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• 2014

This paper presents a high-efficiency concurrent dual-band Class-E power amplifier(PA) that is based on a multi-harmonic matching network(MHMN). The proposed MHMN controls the impedance at 1.3 GHz, 2.1 GHz, and their second and third harmonics, respectively, by using transmission lines only rather than switches or lumped components. The dual-band Class-E PA is implemented using Avago ATF-50189 GaAs p-HEMT. The PA exhibits a measured output power of 27.1 dBm and 25.7 dBm, a power gain of 6.1 dB and 4.7 dB, and a drain efficiency of 71.2 % and 60.1 % at 1.3 GHz and 2.1 GHz, respectively.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.5
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• pp.223-228
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• 2018

In this paper the water sensor using a coaxial cavity resonator is designed and manufactured. The water sensor which can sense water drop linearly has been constructed with voltage controlled oscillator(VCO), coaxial cavity resonator, RF switch, RF detector, A/D converter, DAC and micro controller. The operating frequency range of the designed water sensor is from 2.5GHz to 3.2GHz and the input voltage and current source are 24[V/DC] and 1[A]. The designed sensor circuit includes VCO, RF switch, RF detector which varies the frequency characteristics of the devices in the high frequency of 3GHz. And so we should correct the error of the frequency characteristics of those devices in the sensor circuit. To do this, we make the reference path which switches the signals to the RF detector directly without sending it to the resonator. According to the result of simulation and measurement, we can see that there is 0-50MHz difference between simulated resonator frequency and manufactured resonator frequency.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.1
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• pp.24-29
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• 2003

A 120kV/70A high voltage switch has been installed at Korea Atomic Energy Research Institute(KAERI) in Taejon to supply power with Korea Superconducting Tokamak Advanced Research(KSTAR) Neutral Beam Injection(NBI) system. NBI system requires fast cutoff of the flower supply voltage for protection of the grid when arc detected and fast turn-on the voltage for sustaining the beam current. Therefore the high voltage switch and arc current detection circuit are important part of the NBI power supply. There are much need for high voltage solid state switches in NBI system and a broad area of applications. This switch consisted of 100 series connected MOSFETs and adopted the proposed simple and reliable gate drive circuit without bias supply. Various results taken during the commissioning phase with a 100kW resistive load and NBI source arc shown. This paper presents the detailed design of 120kV/70A high voltage MOSFETs switch and simple gate drive circuit. Problems with the high voltage switch and gate driver during thefabrication and test and solutions are also presented.