• 한국진공학회:학술대회논문집
• /
• 한국진공학회 1999년도 제17회 학술발표회 논문개요집
• /
• pp.173-173
• /
• 1999

The initial growth mode of Nb on Ag(110) in sub-monolayer region is studied using Scanning Tunneling microscopy. E-beam evaporated Nb is deposited onto the substrate at RT, and STM measurements are carried out at RT and 78K. With Nb being immiscible in bulk Ag, 3D islands formation begins at early stage and no particular ordered structure is found. At very low coverages, however, many interesting phenomena are observed in association with Nb clusters. Small Nb clusters as deposited displays very strong size dependence against atom-manipulation by the STM tip. In addition, the apparent corrugation of clusters below the critical size exhibits dramatic dependence on the imaging bias, disappearing completely over a wide range of the bias. Possible physical mechanism responsible for such behavior will be discussed.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2011년도 제40회 동계학술대회 초록집
• /
• pp.136-136
• /
• 2011

반도체 및 전자기기 산업에 있어서 NVM은 아주 중요한 부분을 차지하고 있다. NVM은 디스플레이 분야에 많은 기여를 하고 있는데, 측히 AMOLED에 적용이 가능하여 온도에 따라 변하는 구동 전류, 휘도, color balance에 따른 문제를 해결하는데 큰 역할을 한다. 본 연구에서는 bottom gate 구조의 nc-Si NVM 실험을 진행하였다. P-type silicon substrate (0.01~0.02 ${\Omega}-cm$) 위에 Blocking layer 층인 SiO2 (SiH4:N2O=6:30)를 12.5nm증착하였고, Charge trap layer 층인 SiNx (SiH4:NH3=6:4)를 20 nm 증착하였다. 마지막으로 Tunneling layer 층인 SiOxNy은 N2O (2.5 sccm) 플라즈마 처리를 통해 2.5 nm 증착하였다. 이러한 ONO 구조층 위에 nc-Si을 50 nm 증착후에 Source와 Drain 층을 Al 120 nm로 evaporator 이용하여 증착하였다. 제작한 샘플을 전기적 특성인 Threshold voltage, Subthreshold swing, Field effect mobility, ON/OFF current ratio, Programming & Erasing 특성, Charge retention 특성 등을 알아보았다.

• 한국진공학회지
• /
• 제4권3호
• /
• pp.270-274
• /
• 1995

The growth structure of Fe on CU(001) was studied by scanning tunneling microscope. An analysis of size distribution of Fe islands on Cu(001) surface was made to determine whether Fe atoms mix with substrate Cu. The size distribution deviates from the standard scaling behavior, indicating that atomic density of Fe decreases with coverage up to 1 ML. The growth can be characterized by layer-by-layer scheme from 1 ML to 5 ML. This result agrees well with previously studied, Auger spectroscopy and RHEED result.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2011년도 제40회 동계학술대회 초록집
• /
• pp.77-77
• /
• 2011

These days, a growing demand for memory device is filled up with the flash memory and the dynamic random access memory (DRAM). Although DRAM is a reasonable solution for current demand, the universal novel memory with high density, high speed and nonvolatility, needs to be developed. Among various new memories, the magnetic random access memory (MRAM) device is considered as one of good candidate memories because of excellent features including high density, high speed, low operating power and nonvolatility. The etching of MTJ stack which is composed of magnetic materials and insulator such as MgO is one of the vital process for MRAM. Recently, MgO has attracted great interest in the MTJ stack as tunneling barrier layer for its high tunneling magnetoresistance values. For the successful realization of high density MRAM, the etching process of MgO thin films should be investigated. Until now, there were some works devoted to the investigations on etch characteristics of MgO thin films. Initially, ion milling was applied to the etching of MgO thin films. However, ion milling has many disadvantages such as sidewall redeposition and etching damage. High density plasma etching containing the magnetically enhanced reactive ion etching and high density reactive ion etching have been employed for the improvement of etching process. In this work, inductively coupled plasma reactive ion etching (ICPRIE) system was adopted for the improvement of etching process using MgO thin films and etching gas mixes of $CH_4$/Ar and $CH_4$/$O_2$/Ar have been employed. The etch rates are measured by a surface profilometer and etch profiles are observed using field emission scanning emission microscopy (FESEM). The effects of gas concentration and etch parameters such as coil rf power, dc-bias voltage to substrate, and gas pressure on etch characteristics will be systematically explored.

• 한국진공학회지
• /
• 제15권1호
• /
• pp.37-44
• /
• 2006

초고진공 아래에서 주사터널링현미경을 이용해서 $495^{\circ}C$의 Si(5 5 12) 기판에 호모에피텍시를 시도하여 층상성장의 미세한 과정을 연구하였다 최초에는 Si Dimer가 기본블록이 되어 Si(5 5 12) 단위세포 내 (337)과 (225) 부분의 Si Dimer/Adatom 자리에 우선적으로 흡착하여 Si(5 5 12) 단위세포는 Si addimer로 채워진 $3\times(337)$ 세부 부분과 $1\times(113)$ 세부 부분으로 변한다. 이 과정 중 Si(5 5 12) 단위세포 내 또 다른 (337)에 있는 Tetramer는 Si Dimer를 흡착할 수 있는 Dimer/Adatom 자리로 변환한다 추가적인 Si 흡착으로 각각의 (337) 부분은 (112)과 (113)으로 나뉘어, 마침내 Si(5 5 12) 단위세포는 $3\times(112)\;와\; 4\times(113)$의 패싯들로 바뀐다. 이 단계에서 벌집사슬형과 Dimer/Adatom의 1차원 구조의 상호 변환이 선택적으로 일어난다. 기판의 단위세포 주기를 가지는 패싯의 높이는 2.34 효까지 성장하며, 끝으로 이 패싯 사이의 골짜기가 채워진다. 마지막 단계가 끝나면 균일하고 평평한 Si(5 5 12) 테라스가 복원된다. 본 연구로부터 Si(5 5 12) 호모에피텍시가 단위세포 당 28 개의 Si 원자가 흡착됨으로써 주기적으로 이루어지고, 기판 단위세포 내에서 패시팅이 균일한 오버레이어 필름 두께를 유도하는 데에 결정적 역할을 한다는 점에서 그 성장 방식이 독특하다고 할 수 있다.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
• /
• pp.370.1-370.1
• /
• 2014

Giant magnetoresistance (GMR), tunneling magnetoresistance (TMR), and magnetic random-access memory (MRAM) are currently active areas of research. Magnetite, Fe3O4, is predicted to possess as half-metallic nature, ~100% spin polarization (P), and has a high Curie temperature (TC~850 K). On the other hand, Spinel ferrite CoFe2O4 has been widely studies for various applications such as magnetorestrictive sensors, microwave devices, biomolecular drug delivery, and electronic devices, due to its large magnetocrystalline anisotropy, chemical stability, and unique nonlinear spin-wave properties. Here we have investigated the magneto-transport properties of epitaxial CoxFe3-xO4 thin films. The epitaxial CoxFe3-xO4 (x=0; 0.4; 0.6; 1) thin films were successfully grown on MgO (100) substrate by molecular beam epitaxy (MBE). The quality of the films during growth was monitored by reflection high electron energy diffraction (RHEED). From temperature dependent resistivity measurement, we observed that the Werwey transition (1st order metal-insulator transition) temperature increased with increasing x and the resistivity of film also increased with the increasing x up to $1.6{\Omega}-cm$ for x=1. The magnetoresistance (MR) was measured with magnetic field applied perpendicular to film. A negative transverse MR was disappeared with x=0.6 and 1. Anomalous Hall data will be discussed.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2007년도 추계학술대회 논문집
• /
• pp.94-95
• /
• 2007

In this paper, the dependence of electrical characteristics of Silicon-$Al_2O_3$-Nitride-Oxide-Silicon (SANOS) memory cell transistors and program speed, reliability of memory device on interface trap between Si substrate and tunneling oxide was investigated. The devices were fabricated by the identical processing in a single lot except the deposition method of the charge trapping layer, nitride. In the case of P/E speed, it was shown that P/E speed is slower in the SONOS cell transistors with larger interface trap density by charge blocking effect, which is confirmed by simulation results. However, the data retention characteristics show much less dependence on interface trap. Therefore, to improve SANOS memory characteristic, it is very important to optimize the interface trap and charge trapping layer.

• ETRI Journal
• /
• 제34권6호
• /
• pp.950-953
• /
• 2012

Schottky barrier single electron transistors (SB-SETs) and Schottky barrier single hole transistors (SB-SHTs) are fabricated on a 20-nm thin silicon-on-insulator substrate incorporating e-beam lithography and a conventional CMOS process technique. Erbium- and platinum-silicide are used as the source and drain material for the SB-SET and SB-SHT, respectively. The manufactured SB-SET and SB-SHT show typical transistor behavior at room temperature with a high drive current of $550{\mu}A/{\mu}m$ and $-376{\mu}A/{\mu}m$, respectively. At 7 K, these devices show SET and SHT characteristics. For the SB-SHT case, the oscillation period is 0.22 V, and the estimated quantum dot size is 16.8 nm. The transconductance is $0.05{\mu}S$ and $1.2{\mu}S$ for the SB-SET and SB-SHT, respectively. In the SB-SET and SB-SHT, a high transconductance can be easily achieved as the silicided electrode eliminates a parasitic resistance. Moreover, the SB-SET and SB-SHT can be operated as a conventional field-effect transistor (FET) and SET/SHT depending on the bias conditions, which is very promising for SET/FET hybrid applications. This work is the first report on the successful operations of SET/SHT in Schottky barrier devices.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제4권3호
• /
• pp.228-239
• /
• 2004

In this paper, an analytical model accounting for the quantum effects in MOSFETs has been developed to study the behaviour of $high-{\kappa}$ dielectrics and to calculate the threshold voltage of the device considering two dielectrics gate stack. The effect of variation in gate stack thickness and permittivity on surface potential, inversion layer charge density, threshold voltage, and $I_D-V_D$ characteristics have also been studied. This work aims at presenting a relation between the physical gate dielectric thickness, dielectric constant and substrate doping concentration to achieve targeted threshold voltage, together with minimizing the effect of gate tunneling current. The results so obtained are compared with the available simulated data and the other models available in the literature and show good agreement.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
• /
• pp.743-746
• /
• 2003

We have successfully used hydrophobic direct-wafer bonding, along with H-induced layer splitting of Ge, to transfer 700nm think, single-crystal Ge films to Si substrates. Optical and electrical properties have been also observed on these samples. Triple-junction solar cell structures gown on these Ge/Si heterostructure templates show comparable photoluminescence intensity and minority carrier lifetime to a control structure grown on bulk Ge. When heavily doped p$^{+}$Ge/p$^{+}$Si wafer bonded heterostructures were bonded, ohmic interfacial properties with less than 0.3Ω$\textrm{cm}^2$ specific resistance were observed indicating low loss thermal emission and tunneling processes over and through the potential barrier. Current-voltage (I-V) characteristics in p$^{+}$Ge/pSi structures show rectifying properties for room temperature bonded structures. After annealing at 40$0^{\circ}C$, the potential barrier was reduced and the barrier height no longer blocks current flow under bias. From these observations, interfacial atomic bonding structures of hydrophobically wafer bonded Ge/Si heterostructures are suggested.ested.