• Title/Summary/Keyword: stress voltage

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A Study of Predicting Method of Residual Stress Using Artificial Neural Network in $CO_2$ Arc Welding (인공신경회로망을 이용한 탄산가스 아크 용접의 잔류응력 예측에 관한 연구)

  • 조용준;이세헌;엄기원
    • Journal of Welding and Joining
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    • v.13 no.3
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    • pp.77-88
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    • 1995
  • A prediction method for determining the welding residual stress by artificial neural network is proposed. A three-dimensional transient thermomechanical analysis has been performed for the CO$_{2}$ arc welding using the finite element method. The first part of numerical analysis performs a three-dimensional transient heat transfer analysis, and the second part then uses the results of the first part and performs a three-dimensional transient thermo-elastic-plastic analysis to compute transient and residual stresses in the weld. Data from the finite element method are used to train a backpropagation neural network to predict the residual stress. Architecturally, the fully interconnected network consists of an input layer for the voltage and current, a hidden layer to accommodate the ailure mechanism mapping, and an output layer for the residual stress. The trained network is then applied to the prediction of residual stress in the four specimens. It is concluded that the accuracy of the neural network predicting method is fully comparable with the accuracy achieved by the traditional predicting method.

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A Study of Predicting Method of Residual Stress Using Artificial Neural Network in $CO_2$Arc welding

  • Cho, Y.;Rhee, S.;Kim, J.H.
    • International Journal of Korean Welding Society
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    • v.1 no.2
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    • pp.51-60
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    • 2001
  • A prediction method for determining the welding residual stress by artificial neural network is proposed. A three-dimensional transient thermo-mechanical analysis has been performed for the $CO_2$ arc welding using the finite element method. The first part of numerical analysis performs a three-dimensional transient heat transfer analysis, and the second part then uses the results of the first part and performs a three-dimensional transient thermo-elastic-plastic analysis to compute transient and residual stresses in the weld. Data from the finite element method are used to train a back propagation neural network to predict the residual stress. Architecturally, the fully interconnected network consists of an input layer for the voltage and current, a hidden layer to accommodate the failure mechanism mapping, and an output layer for the residual stress. The trained network is then applied to the prediction of residual stress in the four specimens. It is concluded that the accuracy of the neural network predicting method is fully comparable with the accuracy achieved by the traditional predicting method.

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Design of HALL effect integrated circuit with reduced wolgate offset in silicon bipolar technology (옵셋전압을 저감시킨 실리콘 바이폴라 홀 IC 설계)

  • 김정언;홍창희
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.1
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    • pp.138-145
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    • 1995
  • The offset voltage in silicon Hall plates is mainly caused by stress and strain in package, and by alignment in process. The offset voltage is appeared random for condition change with time in the factory, is non-linearly changed with temperature. In this paper proposed new method of design of Hall IC, and methematicaly proved relation layout of chip of 90$^{\circ}$-shift-current Hall plate pair is matched with "Differentail to single ended Conversion amplifier." In the experiment, the offset voltage is reduced about 1/100 time than the original offset voltage.

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The Development of Equalizing Spacer for Minimization of Voltage Drop according to DC Feeder Extension (직류 급전선 증설에 따른 전압강하 최소화를 위한 균압 스페이서 개발)

  • Lee, Jae-Bong;Seo, Il-Kwon;Na, Youn-Il;Kim, Jae-Moon
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.63 no.7
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    • pp.1013-1018
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    • 2014
  • This paper described the development of equalizing spacer for minimization of voltage drop according to DC feeder extension. Power consumption is increased as shorter interval of train driving time and transportation capacity increase in urban subway. Therefore we investigated voltage drop of catenary at a point in case of traction driving of a train in parallel to the DC power supply system. Based on it's result, equalizing spacer is designed and fabrication to minimize the voltage drop in accordance with the power supply line arranged in three rows, and then its performance was confirmed that the stress distribution of main body and the distributed load are satisfied through the body structure modeling.

High Efficiency and Low Device Stress Voltage and Current Clamping ZVS PWM Asymmetrical Half Bridge Converter

  • Han Sang Kyoo;Moon Gun-Woo;Youn Myung Joong
    • Proceedings of the KIPE Conference
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    • 2004.07a
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    • pp.341-345
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    • 2004
  • A high efficiency and low device stress voltage and current clamping BVS PWM asymmetrical half bridge converter is proposed in this paper. To achieve the ZVS of power switches along the wide load range, the transformer leakage inductor $L_{Ikg}$ is increased. Then, to solve the problem related to ringing in the secondary rectifier caused by the resonance between $L_{Ikg}$ and rectifier junction capacitors, the proposed converter employs a voltage and current clamping cell, which helps voltages and currents of rectifier diodes to be clamped at the output voltage and output current, respectively. Therefore, no RC-snubber for rectifier diodes is needed and a high efficiency as well as low noise output voltage can be realized. In addition, since all energy stored in $L_{Ikg}$ is transferred to the output side, the circulating energy problem can be effectively solved and duty loss does net exist. The operational principle, theoretical analysis, and design considerations are presented. To confirm the operation, validity, and features of the proposed circuit, experimental results from a 425W, 385-170Vdc prototype are presented.

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Effect of Negative Substrate Bias Voltage on the Microstructure and Mechanical Properties of Nanostructured Ti-Al-N-O Coatings Prepared by Cathodic Arc Evaporation

  • Heo, Sungbo;Kim, Wang Ryeol;Park, In-Wook
    • Journal of the Korean institute of surface engineering
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    • v.54 no.3
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    • pp.133-138
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    • 2021
  • Ternary Ti-X-N coatings, where X = Al, Si, Cr, O, etc., have been widely used for machining tools and cutting tools such as inserts, end-mills, and etc. Ti-Al-N-O coatings were deposited onto silicon wafer and WC-Co substrates by a cathodic arc evaporation (CAE) technique at various negative substrate bias voltages. In this study, the influence of substrate bias voltages during deposition on the microstructure and mechanical properties of Ti-Al-N-O coatings were systematically investigated to optimize the CAE deposition condition. Based on results from various analyses, the Ti-Al-N-O coatings prepared at substrate bias voltage of -80 V in the process exhibited excellent mechanical properties with a higher compressive residual stress. The Ti-Al-N-O (-80 V) coating exhibited the highest hardness around 30 GPa and elastic modulus around 303 GPa. The improvement of mechanical properties with optimized bias voltage of -80 V can be explained with the diminution of macroparticles, film densification and residual stress induced by ion bombardment effect. However, the increasing bias voltage above -80 V caused reduction in film deposition rate in the Ti-Al-N-O coatings due to re-sputtering and ion bombardment phenomenon.

Thickness Dependence of Stress Currents in Silicon Oxide (실리콘 산화막에서 스트레스 전류의 두께 의존성)

  • 강창수;이형옥;이성배;서광일
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1997.11a
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    • pp.102-105
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    • 1997
  • The thickness dependence of stress voltage oxide currents has been measured in oxides with thicknesses between 10nm and 80nm. The oxide currents were shown to be composed of stress current and transient current. The stress current was caused by trap assited tunneling through the oxide. The transient current was caused by the tunneling charging and discharging of the trap in the interfaces. The stress current was used to estimate to the limitations on oxide thicknesses. The transient current was used to the data retention in memory devices.

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A Polysilicon Field Effect Transistor Pressure Sensor of Thin Nitride Membrane Choking Effect of Right After Turn-on for Stress Sensitivity Improvement (스트레스 감도 향상을 위한 턴 온 직후의 조름 효과를 이용한 얇은 질화막 폴리실리콘 전계 효과 트랜지스터 압력센서)

  • Jung, Hanyung;Lee, Junghoon
    • Journal of Sensor Science and Technology
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    • v.23 no.2
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    • pp.114-121
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    • 2014
  • We report a polysilicon active area membrane field effect transistor (PSAFET) pressure sensor for low stress deflection of membrane. The PSAFET was produced in conventional FET semiconductor fabrication and backside wet etching. The PSAFET located at the front side measured pressure change using 300 nm thin-nitride membrane when a membrane was slightly strained by the small deflection of membrane shape from backside with any physical force. The PSAFET showed high sensitivity around threshold voltage, because threshold voltage variation was composed of fractional function form in sensitivity equation of current variation. When gate voltage was biased close to threshold voltage, a fractional function form had infinite value at $V_{tn}$, which increased the current variation of sensitivity. Threshold voltage effect was dominant right after the PSAFET was turned on. Narrow transistor channel established by small current flow was choked because electron could barely cross drain-source electrodes. When gate voltage was far from threshold voltage, threshold voltage effect converged to zero in fractional form of threshold voltage variations and drain current change was mostly determined by mobility changes. As the PSAFET fabrication was compatible with a polysilicon FET in CMOS fabrication, it could be adapted in low pressure sensor and bio molecular sensor.

Analysis on the Effect of LCR Filter to Mitigate Transient Overvoltage on the High Voltage Induction Motor Fed by Multi Level Inverter (멀티레벨 인버터 구동 고압유도전동기에시 발생하는 과도과전압 저감을 위한 LCR필터의 효과분석)

  • Kim, Jae-Chul;Kwon, Young-Mok
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.20 no.3
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    • pp.45-52
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    • 2006
  • In this paper, we analyze on the effect of LCR filter to mitigate transient overvoltage on the high voltage induction motor fed by H-bridge cascaded 7-level inverter. The switching surge voltage that it was occurred in inverter appears transient overvoltage at the motor input terminal. the transient overvoltage becomes the major cause to occur the insulation failure by serious voltage stress in the stator winding of high voltage induction motor. The effect of transient overvoltage appears more serious in high voltage induction motor than low voltage induction motor. We selected LCR filter for reduction of the transient overvoltage. Consequently, we demonstrated that the LCR filter connected to the invertor output terminals greatly reduces the transient voltage stress and ringing. The results of simulation show the suppression of transient overvoltage at the motor end of a long cable. using EMTP

ZVT Series Capacitor Interleaved Buck Converter with High Step-Down Conversion Ratio

  • Chen, Zhangyong;Chen, Yong;Jiang, Wei;Yan, Tiesheng
    • Journal of Power Electronics
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    • v.19 no.4
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    • pp.846-857
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    • 2019
  • Voltage step-down converters are very popular in distributed power systems, voltage regular modules, electric vehicles, etc. However, a high step-down voltage ratio is required in many applications to prevent the traditional buck converter from operating at extreme duty cycles. In this paper, a series capacitor interleaved buck converter with a soft switching technique is proposed. The DC voltage ratio of the proposed converter is half that of the traditional buck converter and the voltage stress across the one main switch and the diodes is reduced. Moreover, by paralleling the series connected auxiliary switch and the auxiliary inductor with the main inductor, zero voltage transition (ZVT) of the main switches can be obtained without increasing the voltage or current stress of the main power switches. In addition, zero current turned-on and zero current switching (ZCS) of the auxiliary switches can be achieved. Furthermore, owing to the presence of the auxiliary inductor, the turned-off rate of the output diodes can be limited and the reverse-recovery switching losses of the diodes can be reduced. Thus, the efficiency of the proposed converter can be improved. The DC voltage gain ratio, soft switching conditions and a design guideline for the critical parameters are given in this paper. A loss analysis of the proposed converter is shown to demonstrate its advantages over traditional converter topologies. Finally, experimental results obtained from a 100V/10V prototype are presented to verify the analysis of the proposed converter.