• The Transactions of the Korean Institute of Electrical Engineers
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• v.45 no.4
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• pp.568-573
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• 1996

The amorphous silicon films deposited by low pressure chemical vapor deposition are crystallized by the various annealing techniques including low-temperature furnace annealing and two-step annealing. Two-step annealing is the combination of furnace annealing at 600 [.deg. C] for 24 h and the sequential furnace annealing at 950 [.deg. C] 1h or the excimer laser annealing. It s found that two-step annealings reduce the in-grain defects significantly without changing the grain boundary structure. The performance of the poly-Si thin film transistors (TFTs) produced by employing the tow-step annealing has been improved significantly compared with those of one-step annealing. (author). 13 refs., 6 figs., 1 tab.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.3
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• pp.190-194
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• 2003

Dielectric thin films of (P $b_{0.72}$,L $a_{0.28}$) $Ti_{0.93}$ $O_3$ (PLT(28)) have been deposited on Pt(111)/Ti/ $SiO_2$/Si(100) substrates in-situ by pulsed laser deposition using different annealing and deposition Processes. We have investigated the effect of hydrogen annealing on the ferroelectric properties of PLT thin films and found that the annealing process causes the diffusion of hydrogen into the ferroelectric film resulting in the destruction of polarization. We have tried to form the film by a two-step deposition process In order to improve electrical property. Two-step process to grow PLT films was adopted and verified to be useful to enlarge the grain size of the film and to reduce the leakage current characteristics. Structural properties and electrical properties including dielectric constant, ferroelectric characteristics, and leakage current of PLT thin films were shown to be strongly influenced by grain size. The film deposited by using two-step Process including pre-annealing treatment has a strongly(111) orientation. However, the films deposited by using single -step process with hydrogen annealing process show the smallest grain size. The film deposited by using two-step process including pre-annealing treatment shows the leakage current density of below 10$^{-7}$ A/c $m^2$ for the field of smaller than 100 kV/cm. However, the films deposited by using single-step process with hydrogen annealing process and pre-annealing process show worse leakage current density than the film deposited by using two-step process including pre-annealing treatment.tment.

• Progress in Superconductivity
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• v.2 no.2
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• pp.71-75
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• 2001

The effect of annealing step-edges of LaAlO$_3$ and MgO single crystal substrates on YBa$_2$Cu$_3$O$_{7}$ junction has been studied. The step-edge was fabricated by argon ion milling and was annealed at 105$0^{\circ}C$ in 1 attn oxygen pressure. We compared AFM image near step-edge of the substrates between before and after annealing process. And YBa$_2$Cu$_3$O$_{7}$ thin film was deposited on the step-edge by a standard pulsed laser deposition. The step-edge junctions were characterized by current-voltage curves at 77 K. The annealing of step-edges of MgO substrate improved the current-voltage characteristic of Josephson junction: double steps in the current-voltage characteristic disappeared. However the annealing for LaAlO$_3$ did not improve the junction property.rty.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.10
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• pp.796-803
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• 1998

Intrinsic and proximity gettering are popular processes to get higher cumulative production yield and usually adopt multi-step annealing and high energy ion implantation, respectively. In order to test the combined processed of these, high energy \ulcornerAs\ulcorner ion implantation and 2-step annealing process were adopted. After the ion implantation followed by 2-step annealing, the wafers were cleaved and etched with Wright etchant. The morphology of cross section on samples was inspected by FESEM. The concentration profile of As was measured by SRP. The location and type of secondary defects inspected by HRTEM were dependent on the 1st annealing temperatures. That is, a line of dislocation located at $1.5mutextrm{m}$ apart from the surface at $600^{\circ}C$ lst annealing was changed to some dislocation lines or loops nearby the surface at 100$0^{\circ}C$. The density of dislocation line was reduced but the size of the defects was enlarged as the temperature increased.

• Journal of the Korean Magnetics Society
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• v.2 no.2
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• pp.91-98
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• 1992

In a $Co_{67}Fe_{4.5}Nb_{2}Si_{10}B_{15}$ amorphous alloy ribbon the effect to two-step annealing on the soft magnetic properties has been studied. By two-step annealing method which the second annealing at low temperature of $310^{\circ}C$ for 2 hours is undertaken after the primary annealing at high temperature above $480^{\circ}C$ for 20 minutes at the vacuum state, the coercive force and the squareness are not changed nearly but the initial permeability at d.c. and the effective permeability at a.c. are remark-ably increased compared with the one-step annealing. The maxima of the initial permeability and the effective permeability at 1 kHz after the two-step annealing are 290,000 and 41,000, respectively, which are 30% higher than those of the one-step annealing. The change of magnetic properties with annealing temperature is discussed in terms of the residual stress, the domain size, the cluster and the crystalline phase.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1424-1425
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• 2006

A four-step rapid thermal annealing (RTA) process is proposed in order to improve the throughput and stabilize the process, compared to the six-step RTA process. Effects of annealing on the properties of a structure mode of CMOS process in both cases were investigated. The implanted dopant(As, $BF_2$ and Ti/TiN) movement in silicon during different rapid thermal annealing conditions was studied using secondary ion mass spectroscopy (SIMS) technique. These results show that the four-step RTA process significantly improves time effect and throughput (15%) by the condition of ramping up compared to the six-step RTA process.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.274-277
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• 2000

Thin Film Transistor(TFTs) were fabricated from poly-Si crystallized by a two-step annealing process on glass substrates. The combination of low-temperature(500$^{\circ}C$) Metal-Induced Lateral Crystallization(MILC) furnace annealing and high -temperature (700$^{\circ}C$) rapid thermal annealing leads to the improvement of the material quality The TFTs measured with this two-step annealing material exhibit better characteristics than those obtained by using conventional MILC furnace annealing.

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.1772-1775
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• 2000

We have fabricated poly-Si TFTs by two-step crystallizaton. Poly-Si films have been prepared by furnace annealing(FA) and rapid thermal annealing(RTA) followed by subsequent the post-annealing, excimer laser annealing. The measured crystallinity of RTA and FA annealed poly-Si film is 77% and 68.5%, respectively. For two-step annealed poly-Si film, the crystallinity has been drastically to 87.7% and 86.3%. The RMS surface roughness from AFM results have been improved from 56.3${\AA}$ to 33.5${\AA}$ after post annealing. The measured transfer characteristics of the two-step annealed poly-Si TFTs have been improved significantly for the both FA-ELA and RTA-ELA. Leakage currents of two-step annealed poly-Si TFTs are lower than that of the devices by FA and RTA. From these results, we can describe the fact that the intra-grain defects has been cured drastically by the post-annealing.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.11
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• pp.859-863
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• 2010

Evolution of surface morphology of ${\alpha}-Al_2O_3$ substrate was investigated as a function of annealing temperature and time. Commercial (0001) ${\alpha}-Al_2O_3$ single crystal substrates were annealed in the range of $600-1000^{\circ}C$ in air. At $600^{\circ}C$, step-terrace structure started to be formed on the substrate. However, the surface roughness on the terrace was still considerable and a number of islands were observed on the step edges as well as the terraces. As the annealing temperature increased, the islands were absorbed into the step edges. Thus the terraces were smoother and the step edges were more straightened. Well-defined surface with a step height of 0.2 nm was formed above $900^{\circ}C$. On the other hand, when the substrate was annealed at a fixed temperature of $1000^{\circ}C$, the change of surface morphology was observed for the substrate annealed for 10 min. After the annealing for 30 min, the surface on which any islands could not survive was observed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.395-397
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• 2002

Dielectric thin films of Pb$\_$0.72/La$\_$0.28/Ti$\_$0.93/O$_3$(PLT(28)) have been deposited on Pt(111)/Ti/SiO$_2$/Si(100) substrates in-situ by pulsed laser deposition using different annealing and deposition processes. We have investigated the effect of hydrogen annealing on the ferroelectric properties of PLT thin films and found that the annealing process causes the diffusion of hydrogen into the ferroelectric film resulting in the destruction of polarization. Two-step process to grow PLT films was adopted and verified to be useful to enlarge the grain size of the film. Structural properties including dielectric constant, and ferroelectric characteristics of PLT thin films were shown to be strongly influenced by grain size. The film deposited by using two-step process including pre-annealing treatment has a strong (111) orientation. However, the films deposited by using single-step process with hydrogen annealing process shows the smallest grain size.