• 마이크로전자및패키징학회지
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• 제7권1호
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• pp.51-59
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• 2000

As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology for their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electroless nickel, solder jetting, stud humping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. Research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2001년도 Proceedings of 6th International Joint Symposium on Microeletronics and Packaging
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• pp.27-34
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• 2001

The BGA Package has been the area array package of choice for several rears. Recently, the transition has been to finer pitch configuration called Chip Scale Packages (CSP). Several of these package types are available at 0.5 mm pitch, requiring surface mount assemblers to evaluate and optimize various elements of the assembly process. This presentation describes the issues associated with making the transition from BGA to CSP assembly. Areas addressed will include the accuracy of pick and piece equipment, printed wiring board lines and spaces, PWB vias, in-circuit test issues, solder paste printing, moisture related factors, rework and reliability. The transition to 0.5 mm pitch requires careful evaluation of the board design, solder paste selection, stencil design and component placement accuracy. At this pitch, ball and board pad diameters can be as small as 0.25 mm and 0.20 mm respectively. Drilled interstitial vias are no longer possible and higher ball count packages require micro-via board technology. The transition to CSP requires careful evaluation of these issues. Normal paste registration and BGA component tolerances can no longer achieve the required process levels and higher accuracy pick and place machines need to be implemented. This presentation will examine the optimization of these critical assembly operations, contrast the challenges at 0.5 mm and also look at the continuation of the process to incorporate smaller pitch flip chip devices.

• 마이크로전자및패키징학회지
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• 제12권4호통권37호
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• pp.301-306
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• 2005

새로 개발된 Sn-1.8Bi-0.7Cu-0.6In 솔더의 리플로우 후 고온시효 특성을 전당강도 및 미세구조 분석을 통하여 평가하였다. 범프 형성을 위하여 스텐실 프린트법을 사용하였다. Sn-1.8Bi-0.7Cu-0.6In 솔더의 전단강도가 초기 및 고온시효 후에도 가장 높았고, 생성된 계면 금속간화합물은 리플로우 초기뿐만 아니라 시효 후 동일 하게 $(Cu,\;Ni)_6Sn_5$가 형성되었다. 또한, 500시간 시효 이전에 솔더의 분리 현상이 관찰되었다.

• Journal of Welding and Joining
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• 제30권5호
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• pp.64-69
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• 2012

Sn-Bi eutectic alloy has been widely used as one of the key solder materials for step soldering at low temperature. The Sn-58Bi solder paste containing chloride flux was adopted to compare with that using the chloride-free flux. The paste was applied on the electroless nickel-immersion gold (ENIG) surface finish by stencil printing, and the reflow process was then performed at $170^{\circ}C$ for 10 min. After reflow, the solder joints were aged at $125^{\circ}C$ for 100, 200, 300, 500 and 1000 h in an oven. The interfacial microstructures were obtained by using scanning electron microscopy (SEM), and the composition of intermetallic compounds (IMCs) was analyzed using energy dispersive spectrometer (EDS). Two different IMC layers, consisting of $Ni_3Sn_4$ and relatively very thin Sn-Bi-Ni-Au were formed at the solder/surface finish interface, and their thickness increased with increasing aging time. The wettability of solder joints was investigated by wetting balance test. The mechanical property of each aging solder joint was evaluated by the ball shear test in accordance with JEDEC standard (JESD22-B117A). The results show that the highest shear force was measured when the aging time was 100 h, and the fracture mode changed from ductile fracture to brittle fracture with increasing aging time. On the other hand, the chloride flux in the solder paste did not affect the shear force and fracture mode of the solder joints.