• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
• /
• 2002.11b
• /
• pp.134-139
• /
• 2002

This paper presents a servo design method for high track-density hard disk drives, in which the plant time delay, mainly due to the processor computation time, is taken into account. The key idea behind the proposed design method is to incorporate the delay model into the output equation of the state-space representation for the plant model; thereby, the delay is accounted for by a standard state observer in a natural manner, with simplified state equations as compared to those for conventional methods. The results from practical application confirm that the proposed method is quite effective in realizing a high-bandwidth servo system in hard disk drives.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.58 no.1
• /
• pp.193-198
• /
• 2009

In this paper, we consider the design problem of delay-dependent robust $H{\infty}$ controller of discrete-time descriptor systems with parameter uncertainties and interval time-varying delays in state and control input by delay-dependent LMI (linear matrix inequality) technique. A new delay-dependent bounded real lemma for discrete-time descriptor systems with time-varying delays is derived. The condition for the existence of robust $H{\infty}$ controller and the robust $H{\infty}$ state feedback control law are proposed by LMI approach. A numerical example is demonstrated to show the validity of the design method.

• Proceedings of the IEEK Conference
• /
• 1999.11a
• /
• pp.392-395
• /
• 1999

The state assignment for a finite state machine greatly affects the delay, area, and testabilities of the sequential circuits. In order to minimize the dependencies among state variables, therefore possibly to reduce the length and number of feedback cycles, a new state assignment technique based on m-block partition is introduced in this paper. After the completion of state assignment and logic synthesis, partial scan design is performed to choose minimal number of scan flip-flops. Experiment shows drastic improvement in testabilities while preserving low area and delay overhead.

• Electrical & Electronic Materials
• /
• v.8 no.5
• /
• pp.626-632
• /
• 1995

In this paper, The effect of the impedances in SNOSFET's memory devices has been developed. The effect of source and drain impedances measured by means of two bias resistances - field effect bias resistance by inner region, external bias resistance. The effect of the impedances by source and drain resistance shows the dependence of the function of voltages applied to the gate. It shows the differences of change in source drain voltage by means of low conductance state and high conductance state. It shows the delay of threshold voltages. The delay time of low conductance state and high conductance state by the impedances effect shows 3[.mu.sec] and 1[.mu.sec] respectively.

• Journal of Communications and Networks
• /
• v.16 no.5
• /
• pp.548-558
• /
• 2014

Load distribution is vital to the performance of multipath transport. The task becomes more challenging in real-time multimedia applications (RTMA), which impose stringent delay requirements. Two key issues to be addressed are: 1) How to minimize end-to-end delay and 2) how to alleviate packet reordering that incurs additional recovery time at the receiver. In this paper, we propose sub-packet based multipath load distribution (SPMLD), a new model that splits traffic at the granularity of sub-packet. Our SPMLD model aims to minimize total packet delay by effectively aggregating multiple parallel paths as a single virtual path. First, we formulate the packet splitting over multiple paths as a constrained optimization problem and derive its solution based on progressive approximation method. Second, in the solution, we analyze queuing delay by introducing D/M/1 model and obtain the expression of dynamic packet splitting ratio for each path. Third, in order to describe SPMLD's scheduling policy, we propose two distributed algorithms respectively implemented in the source and destination nodes. We evaluate the performance of SPMLD through extensive simulations in QualNet using real-time H.264 video streaming. Experimental results demonstrate that: SPMLD outperforms previous flow and packet based load distribution models in terms of video peak signal-to-noise ratio, total packet delay, end-to-end delay, and risk of packet reordering. Besides, SPMLD's extra overhead is tiny compared to the input video streaming.

• Journal of Power Electronics
• /
• v.11 no.2
• /
• pp.156-162
• /
• 2011

The control loop time delay caused by sampling, the zero-order-holder effect and calculations is inevitable in the digital control of dc-dc switching converters. The time delay will limit the bandwidth of the control loop and therefore degrade the transient performance of digital systems. In this paper, the quantization time delay effects with different time delay values based on a generic second-order system are analyzed. The conclusion that the bandwidth of digital control is reduced by about 20% with a one cycle delay and by 50% with two cycles of delay in comparison with no time delay is obtained. To compensate the time delay and to increase the control loop bandwidth, a duty ratio predictive control scheme based on linear extrapolation is proposed. The compensation effect and a comparison of the load variation transient response characteristics with analogy control, conventional digital control and duty ratio predictive control with different time delay values are performed on a point-of-load Buck converter by simulations and experiments. It is shown that, using the proposed technique, the control loop bandwidth can be increased by 50% for a one cycle delay and 48.2% for two cycles of delay when compared to conventional digital control. Simulations and experimental results prove the validity of the conclusion of the quantization effects of the time delay and the proposed control scheme.

• Proceedings of the KIPE Conference
• /
• 2001.10a
• /
• pp.174-178
• /
• 2001

An improved stationary frame-based digital current control technique for a permanent magnet (PM) synchronous motor is presented. Generally, the stationary frame current controller is known to provide the advantage of a simple implementation. However, there are some unavoidable limitations such as a steady-state error and a phase delay in the steady-state. On the other hand, in the synchronous frame current regulator, the regulated currents are dc quantities and a zero steady-state error can be obtained through the integral control. However, the need to transform the signals between the stationary and synchronous frames makes the implementation of a synchronous frame regulator complex. Although the PI controller in the stationary frame gives a steady-state error and a phase delay, the control performance can be greatly improved by employing the exact decoupling control inputs for the back EMF, resulting in an ideal steady-state control characteristics irrespective of an operating condition as in the synchronous PI decoupling controller. However, its steady-state response may be degraded due to the inexact cancellation inputs under the parameter variations. To improve the control performance in the stationary frame, the disturbance is estimated using the time delay control. The proposed scheme is implemented on a PM synchronous motor using DSP TMS320C31 and the effectiveness is verified through the comparative simulations and experiments.

• Journal of Power Electronics
• /
• v.1 no.2
• /
• pp.88-98
• /
• 2001

An improved stationary frame-based digital current control technique for a permanent magnet(PM) synchronous motor is presented. Generally, the stationary frame current controller is known to provide the advantage of a simple implementation. However, there are some unavoidable limitations such as a steady-state error and a phase delay in the steady-state. On the other hand, in the synchronous frame current regulator the regulated currents are dc quantities and a zero steady-state error can be obtained through the integral control. However, the need to transform the signals between the stationary and synchronous frames makes the implementation of a synchronous frame regulator complex. Although the PI controller in the stationary frame gives a steady-state error and a phase delay, the control performance can be greatly improved by employing the exact decoupling control inputs for the back EMF., resulting in an ideal steady-state control characteristics irrespective of an operating condition as in the synchronous PI decoupling controller. However, its steady-state response may be degraded due to the inexact cancellation inputs under the parameter variations. To improve the control performance in the stationary frame, the disturbance is estimated using the time delay control. The proposed scheme is implemented on a PM synchronous motor using DSP TMS320C31 and the effectiveness is verified through the comparative simulations and experiments.

• Journal of Institute of Control, Robotics and Systems
• /
• v.18 no.7
• /
• pp.613-616
• /
• 2012

This paper proposes the state observer design for nonlinear systems with delayed output. It is shown that by considering a nonlinear term of error dynamics as an additional state variable, the nonlinear error dynamics with time delay can be transformed into the linear one with time delay. Sufficient conditions for existence of a state observer are characterized by linear matrix inequalities. Finally, an illustrative example is given in order to show the effectiveness of our design method.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
• /
• 2002.11a
• /
• pp.320.1-320
• /
• 2002

In a hard disk drive (HDD) control system, a state-space controller/observer design is popularly adopted fur its advantages such as effective filtering of position and velocity, use of estimation error to handle servo defects, etc. In this report, a systematic method is proposed to accommodate the transport delay in the plant dynamics into the state estimator. (omitted)