• Title/Summary/Keyword: speed compensation

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A Study on the Compensation Methods of Object Recognition Errors for Using Intelligent Recognition Model in Sports Games (스포츠 경기에서 지능인식모델을 이용하기 위한 대상체 인식오류 보상방법에 관한 연구)

  • Han, Junsu;Kim, Jongwon
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.22 no.5
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    • pp.537-542
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    • 2021
  • This paper improves the possibility of recognizing fast-moving objects through the YOLO (You Only Look Once) deep learning recognition model in an application environment for object recognition in images. The purpose was to study the method of collecting semantic data through processing. In the recognition model, the moving object recognition error was identified as unrecognized because of the difference between the frame rate of the camera and the moving speed of the object and a misrecognition due to the existence of a similar object in an environment adjacent to the object. To minimize the recognition errors by compensating for errors, such as unrecognized and misrecognized objects through the proposed data collection method, and applying vision processing technology for the causes of errors that may occur in images acquired for sports (tennis games) that can represent real similar environments. The effectiveness of effective secondary data collection was improved by research on methods and processing structures. Therefore, by applying the data collection method proposed in this study, ordinary people can collect and manage data to improve their health and athletic performance in the sports and health industry through the simple shooting of a smart-phone camera.

Possibility of Establishing an International Court of Air and Space Law (국제항공우주재판소의 설립 가능성)

  • Kim, Doo-Hwan
    • The Korean Journal of Air & Space Law and Policy
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    • v.24 no.2
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    • pp.139-161
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    • 2009
  • The idea of establishing an International Court of Air and Space Law (hereinafter referred to ICASL) is only my academic and practical opinion as first proposal in the global community. The establishment of the International Court of Air and Space Law can promote the speed and promote fairness of the trial in air and space law cases. The creation of an ICASL would lead to strengthening of the international cooperation deemed essential by the global community towards joint settlement in the transnational air and space cases, claims and would act as a catalyst for the efforts and solution on aircraft, satellite and space shuttle's accidents and cases and all manpower, information, trial and lawsuit to be centrally managed in an independent fashion to the benefit of global community. The aircraft, satellite and spacecraft's accidents attributes to the particular and different features between the road, railway and maritime's accidents. These aircraft, satellite and spacecraft's accidents have incurred many disputes between the victims and the air and space carriers in deciding on the limited or unlimited liability for compensation and the appraisal of damages caused by the aircraft's accidents, terror attack, satellite, space shuttle's accidents and space debris. This International Court of Air and Space Law could hear any claim growing out of both international air and space crash accidents and transnational accidents in which plaintiffs and defendants are from different nations. This alternative would eliminate the lack of uniformity of decisions under the air and space conventions, protocols and agreements. In addition, national courts would no longer have to apply their own choice of law analysis in choosing the applicable liability limits or un-limit for cases that do not fall under the air and space system. Thus, creation of an International Court of Air and Space Law would eliminate any disparity of damage awards among similarly situated passengers and shippers in nonmembers of air and space conventions, protocols, agreements and cases. Furthermore, I would like to explain the main items of the abovementioned Draft for the Convention or Statute of the International Court of Air and Space Law framed in comparison with the Statute of the International Court of Justice, the Statue of the International Tribunal for the Law of the Sea and the Statute of the International Criminal Court. First of all, in order to create the International Court of Air and Space Law, it is necessary for us to legislate a Draft for the Convention on the Establishment of the International Court of Air and Space Law. This Draft for the Convention must include the elected method of judges, term, duty and competence of judge, chambers, jurisdiction, hearing and judgment of the ICASL. The members of the Court shall be elected by the General Assembly and Council of the ICAO and by the General Assembly and Legal Committee of the UNCOPUOS from a list of persons nominated by the national groups in the six continent (the North American, South American, African, Oceania and Asian Continent) and two international organization such as ICAO and UNCOPUOS. The members of the Court shall be elected for nine years and may be re-elected as one time. However, I would like to propose a creation an International Court of Air and Space Law in extending jurisdiction to the International Court of Justice at the Hague to in order to decide the air and space convention‘s cases. My personal opinion is that if an International Court on Air and Space Law will be created in future, it will be settled quickly and reasonably the difficulty and complicated disputes, cases or lawsuit between the wrongdoer and victims and the injured person caused by aircraft, satellite, spacecraft's accidents or hijacker and terrorists etc. on account of deciding the standard of judgment by judges of that’s court. It is indeed a great necessary and desirable for us to make a new Draft for the Convention on a creation of the International Court of Air and Space Law to handle international air and space crash litigation. I shall propose to make a new brief Draft for the Convention on the Creation of an International Court of Air and Space Law in the near future.

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A 1.1V 12b 100MS/s 0.43㎟ ADC based on a low-voltage gain-boosting amplifier in a 45nm CMOS technology (45nm CMOS 공정기술에 최적화된 저전압용 이득-부스팅 증폭기 기반의 1.1V 12b 100MS/s 0.43㎟ ADC)

  • An, Tai-Ji;Park, Jun-Sang;Roh, Ji-Hyun;Lee, Mun-Kyo;Nah, Sun-Phil;Lee, Seung-Hoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.7
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    • pp.122-130
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    • 2013
  • This work proposes a 12b 100MS/s 45nm CMOS four-step pipeline ADC for high-speed digital communication systems requiring high resolution, low power, and small size. The input SHA employs a gate-bootstrapping circuit to sample wide-band input signals with an accuracy of 12 bits or more. The input SHA and MDACs adopt two-stage op-amps with a gain-boosting technique to achieve the required DC gain and high signal swing range. In addition, cascode and Miller frequency-compensation techniques are selectively used for wide bandwidth and stable signal settling. The cascode current mirror minimizes current mismatch by channel length modulation and supply variation. The finger width of current mirrors and amplifiers is laid out in the same size to reduce device mismatch. The proposed supply- and temperature-insensitive current and voltage references are implemented on chip with optional off-chip reference voltages for various system applications. The prototype ADC in a 45nm CMOS demonstrates the measured DNL and INL within 0.88LSB and 1.46LSB, respectively. The ADC shows a maximum SNDR of 61.0dB and a maximum SFDR of 74.9dB at 100MS/s, respectively. The ADC with an active die area of $0.43mm^2$ consumes 29.8mW at 100MS/s and a 1.1V supply.

A 10b 200MS/s 75.6mW $0.76mm^2$ 65nm CMOS Pipeline ADC for HDTV Applications (HDTV 응용을 위한 10비트 200MS/s 75.6mW $0.76mm^2$ 65nm CMOS 파이프라인 A/D 변환기)

  • Park, Beom-Soo;Kim, Young-Ju;Park, Seung-Jae;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.3
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    • pp.60-68
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    • 2009
  • This work proposes a 10b 200MS/s 65nm CMOS ADC for high-definition video systems such as HDTV requiring high resolution and fast operating speed simultaneously. The proposed ADC employs a four-step pipeline architecture to minimize power consumption and chip area. The input SHA based on four capacitors reduces the output signal range from $1.4V_{p-p}$ to $1.0V_{p-p}$ considering high input signal levels at a low supply voltage of 1.2V. The proposed three-stage amplifiers in the input SHA and MDAC1 overcome the low output resistance problem as commonly observed in a 65nm CMOS process. The proposed multipath frequency-compensation technique enables the conventional RNMC based three-stage amplifiers to achieve a stable operation at a high sampling rate of 200MS/s. The conventional switched-bias power-reduction technique in the sub-ranging flash ADCs further reduces power consumption while the reference generator integrated on chip with optional off-chip reference voltages allows versatile system a locations. The prototype ADC in a 65nm CMOS technology demonstrates a measured DNL and INL within 0.19LSB and 0.61LSB, respectively. The ADC shows a maximum SNDR of 54.BdB and 52.4dB and a maximum SFDR of 72.9dB and 64.8dB at 150MS/S and 200MS/s, respectively. The proposed ADC occupies an active die area of $0.76mm^2$ and consumes 75.6mW at a 1.2V supply voltage.