• IEMEK Journal of Embedded Systems and Applications
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• v.4 no.3
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• pp.134-138
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• 2009

We present a flash memory system with low cost and high performance for solid-state disk. The proposed flash system is constructed as a SLC with hot blocks and a MLC with cold blocks. Either the SLC or the MLC is selectively accessed on the basis of a position bit in a mapping table. Our results show that the system enables the SLC size to be reduced by about 80% relative to a conventional SLC while maintaining similar performance. And also, our system can improve a performance by above 60% comparing with a conventional MLC.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.9
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• pp.685-689
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• 2009

Flash memory has several features such as low~power consumption and fast access so that there has been various research on using flash memory as new storage. Especially the Solid State Disk which is composed of flash memory chips has recently replaced the hard disk. At present, SSD adopts the multi-channel and multi-way architecture to exploit advantages of parallel access. In this architecture, data are written on SSD in a unit of a superblock which is composed of multiple blocks in which some blocks are put together. This paper proposes two schemes of selecting, segmenting and re-composing victim superblocks to optimize concurrent processing when a buffer flush occurs. The experimental results show that 35% of superblock- based write operations is reduced by selecting victims and additional 9% by composition of superblock.

• Proceedings of the Korean Society of Computer Information Conference
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• 2014.07a
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• pp.343-345
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• 2014

플래시 메모리의 인기가 증가하면서 스토리지 시스템의 변화를 가져왔다. 플래시 메모리 기반의 SSD(Solid State Disk)는 기존의 HDD(Hard Disk Drive)를 대체할 매체로 주목을 받고 있으며 HDD에 비해 훨씬 더 높은 대역폭, 랜덤 접근 성능 및 충격에 강한 장점들을 갖는다. 그러나 플래시 메모리는 HDD와 달리 덮어쓰기(In-Place update)가 불가능 하기 때문에, 데이터를 업데이트 하기 위해서는 해당영역을 지운 후 업데이트를 해야 하는 단점이 있다. 본 논문에서는 캐시 안에서의 거의 접근하지 않을 블락과 캐시로 들어가는 것을 막기 위한 기법을 제시한다. 이것은 캐시의 오염을 막고 더 오랜 기간 동안 캐시 안에서 인기 있는 블락 들을 유지하고 높은 히트율로 연결될 것이다. 또한 캐시 교체의 수를 줄임으로써 SSD의 쓰기를 감소할 것이고 그 결과 성능 뿐만 아니라 SSD의 수명도 연장 에도 도움이 될 것이다.

• The Journal of the Korea institute of electronic communication sciences
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• v.6 no.5
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• pp.665-671
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• 2011

The Competitiveness of Hybrid hard disk drive(H-HDD) for solid state disk(SSD) comes from both lower power consumption and higher reading speed. This paper suggests a prefetching scheme that can improve the performance of Non-Volatile cache(NVCache) memory installed on the H-HDD through prefetching disk blocks as well as files to the NVCache. The proposed scheme makes the highly used data such as booting files copy to the NVCache as an unit of file and the frequently accessed blocks copy to the NVCache. This prefetching is done on the idle time of disk queue and the priorities of prefetched target blocks are based on both time and spatial locality of blocks. Experiments results show that the suggested method can improve response time of H-HDD and also lower the power consumption.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.5
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• pp.41-47
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• 2010

This paper has proposed parallel BCH, one of error correction coding methods which has been used to NAND flash memory for SSD(solid state disk). To alter error correction capability, the proposed design improved reliability on data block has higher error rate as used frequency increasingly. Decoding parallel process bit width is as two times as encoding parallel process bit width, that could reduce decoding processing time, accordingly resulting in one half reduction over conventional ECC.

• Communications of the Korean Institute of Information Scientists and Engineers
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• v.25 no.6 s.217
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• pp.18-28
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• 2007

• The Magazine of the IEIE
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• v.37 no.3
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• pp.51-60
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• 2010

• Journal of the Korea Society of Computer and Information
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• v.16 no.10
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• pp.23-31
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• 2011

Recently, Solid state disk is mainly used because this device has lower power consumption as well as higher response time. But it features higher price and lower performance at delete and write operations compared with HDD. To compensate this defect, Hybrid hard disk with internal non-volatile flash memory was issued. This NVCache is used as a kind of cache for disk blocks. In this paper, an I/O scheme for H-HDD is proposed for improving low power consumption as well as response time. Our method is to use this NVCache as read cache mainly and write cache when write requests are concentrated. In read cache operation, disk blocks with higher priority determined on basis of time as well as spatial localities are prefetched, which can improve response time. The write operation is conducted only at write peak time as disk spindle up costs higher battery power as well as response time. Experiments results show that the suggested method can improve response time of H-HDD and lower the power consumption.

• Proceedings of the Korean Society of Propulsion Engineers Conference
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• 2004.03a
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• pp.831-838
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• 2004

A fluid-solid conjugate solver has been newly developed and applied to an actual engine disk system. Most of the currently available conjugate solvers lack the special thermal modeling for turbomachinery disk system applications. In the present new code, these special models are implemented to expand the applicability of the conjugate method and to reduce the required computational resources. Most of the conjugate analysis work so far are limited to the axisymmetric framework. However, the actual disk system includes several non-axisymmetric components which inevitably affect the local heat transfer phenomena. Also the previous work devoted to this area usually concentrate their efforts on the steady-state thermal field, although the one in the transient condition is more critical to the engine components. This paper presents full 3D conjugate analysis of a single stage high pressure turbine rotor-stator disk system to assess the three-dimensional effects (Fig. 1). The analysis is carried out not only in the steady-state but also in the engine accelerating transient condition. The predicted temperatures shows good agreement with measured data.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.1
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• pp.15-22
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• 2017

Although there are many efficient techniques to minimize the speed gap between processor and the memory, it remains a bottleneck for various commercial implementations. Since secondary memory technologies are much slower than main memory, it is challenging to match memory speed to the processor. Usually, hard disk drives include semiconductor caches to improve their performance. A hit in the disk cache eliminates the mechanical seek time and rotational latency. To further improve performance a divided disk cache, subdivided between metadata and data, has been proposed previously. We propose a new algorithm to apply the SSD that is flash memory-based solid state drive by applying FTL. First, this paper evaluates the performance of such a disk cache via simulations using DiskSim. Then, we perform an experiment to evaluate the performance of the proposed algorithm.