• Membrane and Water Treatment
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• v.11 no.2
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• pp.159-166
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• 2020

In this study, the performance and antifouling properties of polysulfone (PSf) and polyvinylidene fluoride/polyvinylpyrrolidone (PVDF/PVP) membranes in a membrane bioreactor (MBR) were investigated. The membranes were prepared via phase inversion method, and then characterized by a set of analyses including contact angle, porosity and water flux and applied in a lab-scale MBR system. Soluble microbial product (SMP), extracellular polymeric substance (EPS), FTIR, gel permission chromatography (GPC) and particle size distribution (PSD) analyses were also carried out for MBR system. The results showed that the MBR with PSf membrane had higher hydrophobic organic compounds which resulted in formation of larger flocs in MBR. However, in this MBR had high compressibility coefficient of cake layer was higher (n=0.91) compared to MBR with PVDF/PVP membrane (n=0.8); hence, the fouling was more profound. GPC analysis revealed that compounds with molecular weight lower than 2 kDa are more formed on PSf membrane more than PVDF/PVP membrane. The results of FTIR analysis confirmed the presence of polysaccharide and protein compounds on the cake layer of both membranes which was in good agreement with EPS analysis. In addition, the results showed that their concentration was higher for the cake on PSf membrane.

• The Journal of Korea Robotics Society
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• v.4 no.1
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• pp.1-9
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• 2009

Radio Frequency Identification (RFID) is an automatic identification method. Information such as identification, logistics history, and specification of products are written and stored into the memory of RFID tags (that is, transponders), and retrieved through RF communication between RFID reader device and RFID tags. RFID systems have been applied to many fields of transportation, industry, logistics, environment, etc in order to improve business efficiency and reduce maintenance cost as well. Recently, some research results are announced in which RFID devices are combined with other sensors for mobile robot localization. In this paper, design of multi-protocol baseband for RFID reader device is proposed, and the baseband modem is implemented into SoC (System On a Chip). The baseband modem SoC for multi-protocol RFID reader is composed of several IP (Intellectual Property) blocks such as multi-protocol blocks, CPU, UART(Universal Asynchronous Receiver and Transmitter), memory, etc. As a result, the SoC implemented with FPGA(Field Programmable Gate Array) is applied to real product. It is shown that the size of RFID Reader module designed with the FPGA becomes smaller, and the SoC chip price for the same function becomes cheap. In addition, operation performance could be the same or better than that of the product with no SoC applied.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37B no.9
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• pp.741-749
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• 2012

Ad Hoc Self-Organizing TDMA (ASO-TDMA) has been proposed as a specification to support the multi-hop data communication service for ships over VHF band. It allows for organizing a multi-hop ad-hoc network in a distributed manner by sharing the radio resources among the ships navigating along the route. In this paper, Markov chain analysis is given to provide the average throughput performance for ASO-TDMA protocol Furthermore, the analytical results are verified with computer simulation, which shows that there exists the optimal transmission rate to maximize the average throughput as the subframe size and the number of ships are varying in each hop region.

• ETRI Journal
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• v.25 no.5
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• pp.328-336
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• 2003

Bluetooth is a specification for short-range wireless communication using the 2.4 GHz ISM band. It emphasizes low complexity, low power, and low cost. This paper describes an area-efficient digital baseband module for wireless technology. For area-efficiency, we carefully consider hardware and software partitioning. We implement complex control tasks of the Bluetooth baseband layer protocols in software running on an embedded microcontroller. Hardware-efficient functions, such as low-level bitstream link control; host controller interfaces (HCIs), such as universal asynchronous receiver transmitter (UART) and universal serial bus (USB)interfaces; and audio Codec are performed by dedicated hardware blocks. Furthermore, we eliminate FIFOs for data buffering between hardware functional units. The design is done using fully synthesizable Verilog HDL to enhance the portability between process technologies so that our module can be easily integrated as an intellectual property core no system-on-a-chip (SoC) ASICs. A field programmable gate array (FPGA) prototype of this module was tested for functional verification and realtime operation of file and bitstream transfers between PCs. The module was fabricated in a $0.25-{\mu}m$ CMOS technology, the core size of which was only 2.79 $mm{\times}2.80mm$.

• Journal of IKEEE
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• v.12 no.2
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• pp.118-123
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• 2008

The Khronos group releases OpenGL ES 2.0 API specification bringing streamlined shader programming to graphics processor of embedded system. For this reason, the mobile devices have need of graphics processor for supporting a OpenGL ES 2.0 API. We need to extend instruction`s length to support OpenGLES 2.0 API, so it needs more memory size. In this paper, we propose a new instruction format that offers availability for use the instructions. This proposed instruction adopt a variable length method and unit instruction architecture. This proposed instruction architecture that support to OpenGLES 2.0 API has consist of 32bit unit instructions up to 4 which can be combined for embellishing each other. Therefore, it can execute flexible instruction combination and reduce waste of instruction fields.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.12
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• pp.1353-1358
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• 2014

Tremendous amount of dummy packets are generally generated for faking over a wireless sensor network so as to keep the location privacy of nodes on the communication paths against the global eavesdropping. In this paper, a scoped-flooding protocol is designed for transferring data between each source and mobile sink(aka, basestation) where, the only nodes within the scope are allowed to issue dummy packets at every idle time so that the location privacy of the nodes on the paths is kept and the amount of dummy packets is reduced to the extend of the flooding scope. The size of the flooding diameter can be taken into consideration of the privacy level and the communication cost. We design a detailed specification of the protocol and verify several properties.

• Proceedings of the Korean Geotechical Society Conference
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• 2006.03a
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• pp.1251-1258
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• 2006

Field evaluation of new scour countermeasure using geobag and aggregate is performed to prepare for the basis of design and construction standard in Korea. Polyester non-woven geotextile is determined as a geobag material and tire cord is used to sew up the geobag which contain aggregate. Hwasang-gyo(bridge) is selected as a pilot test site through office review and field investigation. According to the design flood of Hwasang-gyo(bridge), the size and volume of geobag are calculated and construction area and required number of geobags are computed by considering the specification of the pier and foundation of the bridge. After construction, scour depth around geobag construction area is measured and the stability of geobag is ascertained by using pole and digital camera.

• Journal of Hydrogen and New Energy
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• v.17 no.3
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• pp.338-346
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• 2006

In this paper, the test results of medium-size(120 kW class) PV system which was installed in the Taeahn thermal power station of Korea Western Power Co., Ltd., were summarized for developing the practical technology to applicate high voltage grid connection PV system. The 120 kW photovoltaic system which was consisted of 1,300 modules, PCS, and 150 kVA transformer station has been operated since Aug. 05, 2005. For verifying the modeling results of PV system, the operation data was compared with modeling results which was executed commercial PSCAD/EMTD and Psim tools. An equivalent circuit model of a solar cell has been also used for solar array modeling. A series of parameters required for array modeling have been estimated from general specification data of a solar module. A PWM voltage source inverter(VIS) and its current control scheme have been analyzed by using P&O (perturbation and Observation) MPPT algorithms technique.

• Journal of the Korean Institute of Educational Facilities
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• v.1 no.1
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• pp.21-32
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• 1994

It is time to put our top priority on the computer education to cope with rapid chage in technology and expansion of information. With 6th educational reform plan, from 1995 computer courses will be offered as elective subjects in the most of middle schools. However, detail planning for training of computer courses will be offered as elective subjects in the most of middle schools. However, detail planning for training of computer teachers and providing facilicles for computer education hasn't been adequately prepared yet, This will bring about confusion in computer education. The purpose of this study is to propose how to renovate the ordinary classroom into computer classroom. Followings are the suggestions for the educational specification for the renovated computer classroom for middle school in the urban area. 1) Purpose of computer classroom, 2) Size of computer classroom, 3) Curriculum design and class hour, 4) Facilities, 5) Environments, 6) Equipment and media(lighting and electric system, acoustical treatment, cooling/heating and ventilation system), 7) Activity area(Teacher workstation, Student workstation, Support area, Display surface). For the promotion of computer education, the legal, financial and administrative supports by concerned authorities should be established ahead of discussing the contents of computer education.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.2
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• pp.168-173
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• 2008

In this paper, we have designed transmit/receive Module for X band which can be applied to active phase array radar system. AESA(active electrically beam steered array) is able to transmit high power as like TWTA with composition of TH Module and steer a main beam faster than mechanically steering system. The proposed structure of T/R Module for X band is brick type for physical structure, common leg structure electrically and small size design as MCM(multi chip module). The results show that the characteristic of proposed T/R module can fully cover the specification of required military radar application.