• Proceedings of the KIEE Conference
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• 2005.05a
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• pp.239-242
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• 2005

A high speed address recovery technique for AC plasma display Panel(PDP) is proposed. By removing the GND switching operation, the recovery speed can be increased and switching loss due to GND switch also becomes to be reduced. The proposed method is able to perform load-adaptive operation by controlling the voltage level of energy recovery capacitor, which prevents increasing inefficient power consumption caused by circuit loss during recovery operation. Thus, the technique shows the minimum address power consumption according to various displayed images, different from Prior methods operating in fixed mode regardless of images. Test results with 50" HD single-scan PDP(resolution = 1366$\times$768) show that less than 350ns of recovery time is successfully accomplished and about 54% of the maximum power consumption can be reduced, tracing minimum power consumption curves.

• Journal of the Optical Society of Korea
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• v.19 no.3
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• pp.255-259
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• 2015

We have proposed and experimentally verified a pulse-width modulation (PWM) generator which directly generated a PWM signal in the optical domain. Output waveforms were clear at the repetition rate of 16 MHz; the duty cycle (DC) was from 14.7% to 72.1%; and the DC-control resolution was about 4.399%/dB. The PWM generator' operation principle is based on the injection-locking property of a single-mode Fabry-$P{\acute{e}}rot$ laser diode (SMFP-LD). The SMFP-LD, which has a self-locked mode wavelength at ${\lambda}_{PWM}$, was used to detect the power of the injection-locking signal (optical analog input). If the analog input power is high, the SMFP-LD is locked to the wavelength of the input signal ${\lambda}_a$ and there is no output after an optical bandpass filter (OBF). If the analog input power is low, the SMFP-LD is unlocked and there is output signal at ${\lambda}_{PWM}$ after the OBF. Thus, the SMFP-LD plus the OBF provide digital output for an analog input. The DC of the output PWM signal can be controlled by tuning the power of the analog input.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2272-2283
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• 2016

This paper proposes a power conditioning system (PCS) for distributed photovoltaic (PV) applications using an asymmetric cascaded multilevel inverter with a single PV source. One of the main disadvantages of the cascaded multilevel inverters in PV systems is the requirement of multiple isolated DC sources. Using multiple PV strings leads to a compromise in either the voltage balance of individual H-bridge cells or the maximum power point tracking (MPPT) operation due to localized variations in atmospheric conditions. The proposed PCS uses a single PV source with a flyback DC-DC converter to facilitate a reduction of the required DC sources and to maintain the voltage balance during MPPT operation. The flyback converter is used to provide input for low-voltage H-bridge cells which processes only 20% of the total power. This helps to minimize the losses occurring in the proposed PCS. Furthermore, transient analyses and controller design for the proposed PCS in both the stand-alone mode and the grid-connection mode are presented. The feasibility of the proposed PCS and its control scheme have been tested using a 1kW hardware prototype and the obtained results are presented.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.6B
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• pp.403-410
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• 2008

In this paper, we investigate the performance of MMR system in Non-transparent mode. The IEEE 802.16j MMR system has two node of operation, Single-frame (in band) and Multi-frame (out band) mode. In the analysis, we assume that channel interference between MR-BS and RS, or between RSs anywhere in the given area is ignored. The performance is presented in terms of the delay and the frame efficiency by varying number of RS and BS coverage to RS coverage ratio and the maximum coverage area of a BS by varying traffic density. Analytical results show that the Single-frame is more efficient than Multi-frame in frame efficiency and coverage extension.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 1999.11a
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• pp.157-161
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• 1999

This paper presents a Single-phase Semi-Bridge PWM Converter, which features Continuos Conduction Mode and Phase-adjusted Unipolar PWM Method. The reduced conduction losses are achieved by the employment of a single converter, instead of the typical configuration composed of a front end rectifier followed by a boost converter. Theoretical principle of operation, a design example and Simulation results of a 3kW Semi-Bridge PWM converter with 220 Vrms input voltage and 400 Vdc output voltage are presented.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1821-1832
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• 2016

This study presents a strategy using the synchronized output regulation method (SOR) for controlling inverters operating in stand-alone and grid-connected modes. From the view point of networked dynamic systems, SOR involves nodes with outputs that are synchronized but also display a desirable wave shape. Under the SOR strategy, the inverter and grid are treated as two nodes that comprise a simple network. These two nodes work independently under the stand-alone mode. An intermediate mode, here is named the synchronization mode, is emphasized because the transition from the stand-alone mode to the grid-connected mode can be dealt as a standard SOR problem. In the grid-connected mode, the inverter operates in an independent way, in which the voltage reference changes for generalized synchronization where its output current satisfies the required power injection. Such a relatively independent design leads to a seamless transfer between operation modes. The closed-loop system is analyzed in the state space on the basis of the output regulation theory, which improves the robustness of the design. Simulations and experiments are performed to verify the proposed control strategy.

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.5
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• pp.415-429
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• 2011

In this study, a single-phase quasi Z-source AC-AC converters with a series connection of the output terminals is proposed. The proposed system has configuration that the input terminals of two quasi Z-source AC-AC converters are connected in parallel and its output terminals are connected in series. The out of phase mode and in phase mode of the proposed system are presented. To verify the validity of the proposed converter, a DSP controlled hardware was made and PSIM simulation was executed. As a result, controlling the duty ratio of the converter, the desired buck-boost output voltages could be generated. For each modes, as compared with the single converter operation, the proposed converter could enhance the efficiency and input power factor according to different loads. Also, in case of the out of phase mode under the constant load, the efficiency and input power factor of the proposed system are increased 10[%], 35[%] respectively in compared with the single converter. And, the output voltage is constantly controlled in dynamic state in case while the load is suddenly changed.

• ETRI Journal
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• v.28 no.4
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• pp.533-536
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• 2006

A distributed Bragg reflector (DBR) laser and a high speed electroabsorption modulator (EAM) are integrated on the basis of the selective area growth technique. The typical threshold current is 4 to 6 mA, and the side mode suppression ratio is over 40 dB with single mode operation at 1550 nm. The DBR laser exhibits 2.5 to 3.3 mW fiber output power at a laser gain current of 100 mA, and a modulator bias voltage of 0 V. The 3 dB bandwidth is 13 GHz. A 10 Gbps non-return to zero operation with 12 dB extinction ratio is obtained. A four-channel laser array with 100 GHz wavelength spacing was fabricated and its operation at the designed wavelength was confirmed.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.54 no.10
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• pp.470-476
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• 2005

In this paper PU control scheme is presented. The proposed scheme has following features. The one is oft-starting method which is used for preventing to flow large current in motor phase winding when motor starts. The ther is the selection of the level of the over current. The first feature is implemented by increasing the PWM duty lowly, the second feature is implemented by limiting the magnitude of the phase current level by which the over heat f motor by copper losses and magnetic saturation decreases. By the analysis using FEM considering load condition, the peed of mode transition from PW to single pulse control is selected and confirmed by simulation that there is no ver current occurs during the mode transition. For the verification of proposed scheme, the simulation using MATLAB Simulink with considering non-linearity of inductance profile from FEM analysis is performed and the experiment with SRM drive system which has the DSP controller and single Phase SRM are peformed.

• Journal of Power Electronics
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• v.7 no.1
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• pp.44-54
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• 2007

Ac-dc power conversion can either be done with two separate converter stages or with a single converter stage. Two-stage ac-dc converters, however, can be costly and complex, while the performance of single-stage converters is compromised due to a reduced number of components. Several researchers have therefore proposed adding some sort of auxiliary circuit consisting of a second switch and some passive elements to single-stage converters to improve their performance. Although these modified single-stage converters may have two converters, they are not two-stage converters as they do not have two separate and independently controlled converters that are always operating to convert power from one form to another. In this paper, the operation of ac-dc single-stage converters is first reviewed and their strengths and weaknesses are noted. The operation of several modified single-stage converters, including one proposed by the authors, is then discussed, and the paper concludes by presenting experimental results that confirm the feasibility of the proposed converter.