• Proceedings of the KIEE Conference
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• 2008.04a
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• pp.51-52
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• 2008

In this paper, we propose two control schemes. The first control scheme is an adaptive passivity-based excitation control which regulates the terminal voltage to its reference. This controller is obtained through two steps: firstly, a simple direct adaptive passivation controller is designed for the power system with parametric uncertainties; then a linear PI controller is applied to converge the terminal voltage to its reference. The second control scheme is a linear governor control which consists of the frequency and the mechanical power. It is shown that the internal dynamics are locally stable with controllable damping. In the end, the boundness of all electrical variables, the frequency, the mechanical power, and the convergence of the terminal voltage to its reference can be achieved by these control schemes.

• International journal of advanced smart convergence
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• v.4 no.1
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• pp.64-70
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• 2015

This paper proposes fluorescent electronic ballast with high power factor and low line input current harmonics. The system performance can be improved by a charged pump circuit. Details of design and circuit operation are described. The proposed electronic ballast is modified from single-stage half bridge class D electronic ballast by adding capacitor parallel with each power switch and setting the circuit parameter to operate under class DE inverter condition. By using this proposed method the DC bus voltage can be reduced around by 50% compare with conventional class D inverter circuit. Because the power switches are operated at zero voltage switching condition and low dv/dt of class DE switching. The experimental results show that the proper frequency of the prototype is around 50 kHz with input power factor of 0.982, $THD_i$ 10.2% at full load and efficiency of more than 90%.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.486-489
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• 2002

This paper proposes a tabu search (TS) algorithm to optimal weight selection in design of robust H$_{\infty}$ power system stabilize. (PSS), In H$_{\infty}$ control design, the weight selection and the representation of system uncertainties are the major difficulties. To cope with these problems, TS is employed to automatically search for the optimal weights. On the other hand, the normalized coprime factorization (NCF) is used. The H$_{\infty}$ controller can be directly developed without ${\gamma}$-iteration. Also, the pole-zero cancellation phenomena are prevented. The performance and robustness of the proposed PSS under different loading conditions are investigated in comparison with a robust tuned PSS by examining the case of a single machine infinite bus (SMIB) system. The simulation results illustrate the effectiveness and robustness of the proposed PSS.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.869-872
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• 2005

In this paper we present a switch wrapper for an AMBA AXI, which is an efficient on-chip-network interface compared to bus-based interfaces in a multiprocessor SoC. The AXI uses an idea of NoC to provide the increasing demands on communication bandwidth within a single chip. A switch wrapper for AXI is located between a interconnection network and two IPs connecting them together. It carries out a mode of routing to interconnection network and executes protocol conversions to provide compatibility in IP reuse. A switch wrapper consists of a direct router, AHB-AXI converters, interface modules and a controller modules. We propose the design of a all-in-one type switch wrapper.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.52 no.5
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• pp.241-249
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• 2003

This paper describes a novel approach for performing eigenvalue analysis and frequency domain analysis of multi-machine power system. The salient feature of this approach is a direct approach for constructing the state matrix equations of linearized power systems about its operating point using modular technique. These state matrix equations are then used to obtain eigenvalues and mode shapes of the system, and frequency response, or Bode, plots of selected transfer functions. The proposed program provides a flexible tool for systematic analyses of tuning PSS's parameters. The paper also presents its application to the analyses of a single-machine infinite bus system and two-area system with 4 machines.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1998.06a
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• pp.568-572
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• 1998

This paper defines Fuzzy Logic Units(FLUs) which are piece wise finite elements in multidimension Euclidean space, and redefines triangular membership functions which are different from those defined in traditional literature. By analyzing FLUs, this paper gives a constructive method of fuzzy rules in fuzzy logic systems based on finite element method. The simulation results of single machine to infinite bus system show the effectiveness of the proposed method in this paper.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.1
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• pp.85-95
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• 2015

Network-on-chip (NoC) has evolved to overcome the issues of traditional bus-based on-chip interconnect. In NoC-reuse as TAM, the test schedulers are constrained with the topological position of cores and test access points, which may negatively affect the test time. This paper presents a scalable hybrid test data transportation scheme that allows to simultaneously test multiple heterogeneous cores of NoC-based SoCs, while reusing NoC as TAM. In the proposed test scheme, single test stimuli set of multiple CUTs is embedded into each flit of the test stimuli packets and those packets are multicast to the targeted CUTs. However, the test response packets of each CUT are unicast towards the tester. To reduce network load, a flit is filled with maximum possible test response sets before unicasting towards the tester. With the aid of Verilog and analytical simulations, the proposed scheme is proved effective and the results are compared with some recent techniques.

• Proceedings of the KIEE Conference
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• 1991.07a
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• pp.375-378
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• 1991

This paper presents a design method of synchronous generator excitation controller using self-tuning PID algorithm. Controller parameter is determined by using adaptive control theory in order to maintain optimal operation of generator under the various operating conditions. To determine the optimal parameter of controller. minimum variance algorithm using the recursive leastsquare(RLS) indentification method is adopted and the difference between the speed deviation with weighted factor and voltage deviation is used as the input signal of adaptive controller, which provides good damping and conversion characteristics. The results tested on a single machine infinite bus system verify that the proposed controller has better dynamic performances than conventional controller.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.7
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• pp.883-888
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• 2014

The paper describes the parameter tuning of power system stabilizer (PSS) for a power plant based on hybrid system modeling. The existing tuning method based on bode plot and root locus is well applied to keep power system stable. However, due to linearization of power system and an assumption that the parameter ratio of the lead-lag compensator in PSS is fixed, the results cannot guarantee the optimal performances to damp out low-frequency oscillation. Therefore, in this paper, hybrid system modeling, which has a DAIS (differential-algebraic-impusive-switched) structure, is applied to conduct nonlinear modeling for power system and find optimal parameter set of the PSS. The performances of the proposed method are carried out by time domain simulation with a single machine connected to infinite bus (SMIB) system.

• Journal of information and communication convergence engineering
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• v.6 no.4
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• pp.376-382
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• 2008

Developing highly cost-efficient and reliable embedded systems demands hardware/software co-design and co-simulation due to fast TTM and verification issues. So, it is essential that Platform-Based SoC design methodology be used for enhanced reusability. This paper addresses a reusable SoC platform based on OpenCores soft processor with reconfigurable architectures for hardware/software codesign methodology. The platform includes a OpenRISC microprocessor, some basic peripherals and WISHBONE bus and it uses the set of development environment including compiler, assembler, and debugger. The platform is very flexible due to easy configuration through a system configuration file and is reliable because all designed SoC and IPs are verified in the various test environments. Also the platform is prototyped using the Xilinx Spartan3 FPGA development board and is implemented to a single chip using the Magnachip cell library based on $0.18{\mu}m$ 1-poly 6-metal technology.