• Title/Summary/Keyword: silicon oxidation

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Gate Dielectrics and Oxynitridation of Silicon using $N_2O$ Plasma Oxidation ($N_2O$ Plasma Oxidation을 이용한 Silicon의 Oxynitridation과 Gate Dielectrics)

  • Jung, Sung-Wook;Gowtham, M.;Igor, Parm.;Lee, Jun-Sin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.11a
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    • pp.93-94
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    • 2005
  • 본 연구에서는 저온 공정에서 제작되는 소자에의 응용을 위하여 Inductively Coupled Plasma Chemical Vapor Deposition(ICP-CVD) 내에서 $N_2O$ 기체를 활용한 plasma oxidation을 통한 silicon 표면의 oxynitridation과 이로부터 tunnel gate dielectirics로 사용될 SiON 층을 형성하였으며, 형성된 SiOxNy 층의 전기적 특성을 측정하여 tunnel gate dielectrics로서 효과적인 기능을 수행함을 확인하였다. 형성된 박막의 성분 분석을 위하여 energy dispersive spectroscopy(EDS)를 이용하여 SiOxNy 층의 생성을 확인하였으며, 전기적인 특성을 통하여 tunnel gate dielectrics의 기능을 수행함을 알 수 있었다. 형성된 SiOxNy 층은 초박막 형태임에도 절연막으로서의 기능을 나타내었다.

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Relationships between Carrier Lifetime and Surface Roughness in Silicon Wafer by Mechanical Damage (기계적 손상에 의한 실리콘 웨이퍼의 반송자 수명과 표면 거칠기와의 관계)

  • 최치영;조상희
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.12 no.1
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    • pp.27-34
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    • 1999
  • We investigated the effect of mechanical back side damage in viewpoint of electrical and surface morphological characteristics in Czochralski silicon wafer. The intensity of mechanical damage was evaluated by minority carrier recombination lifetime by laser excitation/microwave reflection photoconductance decay technique, atomic force microscope, optical microscope, wet oxidation/preferential etching methods. The data indicate that the higher the mechanical damage degree, the lower the minority carrier lifetime, and surface roughness, damage depth and density of oxidation induced stacking fault increased proportionally.

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A Study on Nucleation, Growth and Shrinkage of Oxidation Induced Stacking Faults (OSF) -Part 1: Nucleation and Thermal Behavior of Oxidation Induced Stacking Faults(OSF) (산화 적층 결합의 생성, 성장 및 소멸에 관한 연구 - 제1부:산화 적층 결함의 생성과 열적 거동)

  • 김용태;김선근;민석기
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.7
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    • pp.759-766
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    • 1988
  • the effect of heat treatment in oxygen ambient on the nucleation and growth of oxidation induced stacking faults(OSF) in n-type(100)silicon wafer has been investigated. The growth of OSF is determind as a function of oxygen concentration in silicon wafer, heat treatment time and temperature, and the activation energy for the growth of OSF can be obtained from the growth kinetics. The activation energies are respectively 2.66 eV for dry oxidation and 2.37 eV for wet oxidation. In this paper, we have also studied the structural feature of OSF with the comparison of optical microscopic morphology and crystalline structure.

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Atomic Study of Oxidation of Si(001) surface by MD Simulation

  • Pamungkas, Mauludi Ariesto;Kim, Byung-Hyun;Joe, Min-Woong;Lee, Kwang-Ryeol
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.360-360
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    • 2010
  • Very initial stage of oxidation process of Si (001) surface was investigated using large scale molecular dynamics simulation. Reactive force field potential was used for the simulation owing to its ability to handle charge variation associated with the oxidation reaction. To know the detail mechanism of both adsorption and desorption of water molecule (for simulating wet oxidation), oxygen molecule (for dry oxidation) and their atom constituents, interaction of one molecule with Si surface was carefully observed. The simulation is then continued with many water and oxygen molecules to understand the kinetics of oxide growth. The results show that possibilities of desorption and adsorption depend strongly on initial atomic configuration as well as temperature. We observed a tendency that H atoms come relatively into deeper surface or otherwise quickly desorbed away from the silicon surface. On the other hand, most oxygen atoms are bonded with first layer of silicon surface. We also noticed that charge transfer is only occur in nearest neighbor regime which has been pointed out by DFT calculation. Atomic structure of the interface between the oxide and Si substrate was characterized in atomic scale.

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Coplanar Waveguides Fabricated on Oxidized Porous Silicon Air-Bridge for MMIC Application (다공질 실리콘 산화막 Air-Bridge 기판 위에 제작된 MMIC용 공면 전송선)

  • 박정용;이종현
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.5
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    • pp.285-289
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    • 2003
  • This paper proposes a 10 ${\mu}{\textrm}{m}$ thick oxide air-bridge structure which can be used as a substrate for RF circuits. The structure was fabricated by anodic reaction, complex oxidation and rnicrornachining technology using TMAH etching. High quality films were obtained by combining low temperature thermal oxidation (50$0^{\circ}C$, 1 hr at $H_2O$/O$_2$) and rapid thermal oxidation (RTO) process (105$0^{\circ}C$, 2 min). This structure is mechanically stable because of thick oxide layer up to 10 ${\mu}{\textrm}{m}$ and is expected to solve the problem of high dielectric loss of silicon substrate in RF region. The properties of the transmission line formed on the oxidized porous silicon (OPS) air-bridge were investigated and compared with those of the transmission line formed on the OPS layers. The insertion loss of coplanar waveguide (CPW) on OPS air-bridge was (about 1 dB) lower than that of CPW on OPS layers. Also, the return loss of CPW on OPS air-bridge was less than about - 20 dB at measured frequency region for 2.2 mm. Therefore, this technology is very promising for extending the use of CMOS circuitry to higher RF frequencies.

Corrosion behavior of oxide layer formed on surface of high silicon aluminum alloy by PEO process (고규소 알루미늄 합금의 표면에 PEO 공정에 의하여 형성된 산화물 층의 부식 거동)

  • Deok-Yong Park
    • Journal of the Korean institute of surface engineering
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    • v.56 no.4
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    • pp.250-258
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    • 2023
  • Ceramic oxide layer was formed on the surface of high silicon aluminum alloy by using PEO (plasma electrolytic oxidation) process. The microstructure of the oxide layer was analyzed using scanning electron microscopy (SEM) and x-ray diffraction patterns (XRD). The high silicon aluminum alloy prior to PEO process consists of Al, Si and Al2Cu phases in XRD analysis, whereas Al2Cu phase selectively disappeared after PEO treatment. Considerable decrease of relative intensity in most of peaks in XRD results of the high silicon aluminum alloy treated by PEO process was observed. It may be attributed to the formation of amorphous phases after PEO treatment. The corrosion behavior of the high silicon aluminum alloy treated by PEO process was investigated using electrochemical impedance spectroscopy (EIS) and other electrochemical techniques (i.e., open circuit potential and polarization curve). Electroanalytical studies indicated that the high silicon aluminum alloy treated by PEO process shows greater corrosion resistance than that untreated by PEO process.

Effects of Oxidation and Hot Corrosion on the Erosion of Silicon Nitride

  • Kim, Jong Jip
    • Corrosion Science and Technology
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    • v.4 no.4
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    • pp.136-139
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    • 2005
  • The effect of oxidation and hot corrosion on the solid particle erosion was investigated for hot-pressed silicon nitride using as-polished, pre-oxidized and pre-corroded specimens by molten sodium sulfates. Erosion tests were performed at 22, 500 and $900^{\circ}C$ using angular silicon carbide particles of mean diameter $100{\mu}m$. Experimental results show that solid particle erosion rate of silicon nitride increases with increasing temperature for as-polished or pre-oxidized specimens in consistent with the prediction of a theoretical model. Erosion rate of pre-oxidized specimens is lower than that of as-polished specimens at $22^{\circ}C$, but it is higher at $900^{\circ}C$. Lower erosion rate at $22^{\circ}C$ in the pre-oxidized specimens is attributed due to the blunting of surface flaws, and the higher erosion rate at $900^{\circ}C$ is due to brittle lateral cracking. Erosion rate of pre-corroded specimens decreases with increasing temperature. Less erosion at $900^{\circ}C$ than at $22^{\circ}C$ is associated with the liquid corrosion products sealing off pores at $900^{\circ}C$ and the absence of inter-granular crack propagation observed at $22^{\circ}C$.

Pile-up of phosphorus emitters using thermal oxidation (열산화법에 의한 phosphorus 에미터 pile-up)

  • Boo, Hyun Pil;Kang, Min Gu;Lee, KyungDong;Lee, Jong-Han;Tark, Sung Ju;Kim, Young Do;Park, Sungeun;Kim, Dongwhan
    • 한국신재생에너지학회:학술대회논문집
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    • 2011.05a
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    • pp.122.1-122.1
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    • 2011
  • Phosphorus is known to pile-up at the silicon surface when it is thermally oxidized. A thin layer, about 40nm thick from the silicon surface, is created containing more phosphorus than the bulk of the emitter. This layer has a gaussian profile with the peak at the surface of the silicon. In this study the pile-up effect was studied if this layer can act as a front surface field for solar cells. The effect was also tested if its high dose of phosphorus at the silicon surface can lower the contact resistance with the front metal contact. P-type wafers were first doped with phosphorus to create an n-type emitter. The doping was done using either a furnace or ion implantation. The wafers were then oxidized using dry thermal oxidation. The effect of the pile-up as a front surface field was checked by measuring the minority carrier lifetime using a QSSPC. The contact resistance of the wafers were also measured to see if the pile-up effect can lower the series resistance.

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An Experimental Study on the Oxidation Process of Silicon (실리콘 산화공정에 대한 실험적 고찰)

  • 최연익;김충기
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.16 no.1
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    • pp.26-32
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    • 1979
  • Dry oxidation and wet oxidation processes of silicon have been examined experimentally. The oxidation temperatures were 1.10$0^{\circ}C$, 1.15$0^{\circ}C$, and 1.200 $^{\circ}C$, and oxygen flow rate was changed from 0.2 liter/min to 2.8 liter/min. From the experimental measurements, oxidation temperaturel time and oxygen flow rate have been tabutated for oxide layers 0.1$\mu$ - 1.0$\mu$ in thickness. The quality of the grown oxide layer has been investigated In terms of the dielectric constant, breakdown voltage, fixed surface charge densify (Qss/q) and mobile charge density (Q /q). From these measurements, it is concluded that the quality of the oxide layer is sufficient to expect the normal operation of MOS transistors.

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Oxidation of CrAlMgSiN thin films between 600 and 900℃ in air (CrAlMgSiN 박막의 600-900℃에서의 대기중 산화)

  • Won, Seong-Bin;Xu, Chunyu;Hwang, Yeon-Sang;Lee, Dong-Bok
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2013.05a
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    • pp.112-113
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    • 2013
  • Thin CrAlMgSiN films, whose composition were 30.6Cr-11.1Al-7.3Mg-1.2Si-49.8N (at.%), were deposited on steel substrates in a cathodic arc plasma deposition system. They consisted of alternating crystalline Cr-N and AlMgSiN nanolayers. After oxidation at $800^{\circ}C$ for 200 h in air, a thin oxide layer formed by outward diffusion of Cr, Mg, Al, Fe, and N, and inward diffusion of O ions. Silicon ions were relatively immobile at $800^{\circ}C$. After oxidation at $900^{\circ}C$ for 10 h in air, a thin $Cr_2O_3$ layer containing dissolved ions of Al, Mg, Si, and Fe formed. Silicon ions became mobile at $900^{\circ}C$. After oxidation at $900^{\circ}C$ for 50 h in air, a thin $SiO_2-rich$ layer formed underneath the thin $Cr_2O_3$ layer. The film displayed good oxidation resistance. The main factor that decreased the oxidation resistance of the film was the outward diffusion and subsequent oxidation of Fe at the sample surface, particularly along the coated sample edge.

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