• Journal of the Korean institute of surface engineering
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• v.29 no.6
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• pp.760-765
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• 1996

Silicon oxide thin films are prepared by plasma-enhanced CVD (PECVD) using 100kHz and 13.56MHz generators. Source gases are two sorts of mixture, tetramethoxysilane (TMOS) and oxygen, and tetramethylsilane (TMS) and oxygen. We investigate the effect of frequency on film properties of deposited films including mechanical properties. 100kHz PECVD process can deposit silicon oxide films at $23^{\circ}C$ at the power of 20W. X-ray photoelectron spectroscopy (XPS), infrared spectroscopy (IR) and ellipsometric measurements reveal that the structural quality of the films prepared both by 100kHz process and by 13.56MHz process are very like silicon dioxide. The 100kHz process is adequate for low temperature deposition of SiOx films.

• Electrical & Electronic Materials
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• v.10 no.8
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• pp.794-799
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• 1997

Poly-Si films have been prepared by solid phase crystallization of LPCVD(low-pressure CVD) amorphous silicon. The crystallinity of poly-Si films has been derived from UV reflectance spectrum and lies in the range between 70% and 80% . From XRD measurement the peak at 28.2$^{\circ}$from (111) plane is dominantly detected in the SPC poly-Si films, The average grain size of poly-Si film is determined by the image of SEM and varies from 4000 $\AA$ to 8000$\AA$. The electrical conductivity of as-deposited amorphous silicon film is about 2.5$\times$10$^{-7}$ ($\Omega$.cm)$^{-1}$ , and 3~4$\times$10$^{-6}$ ($\Omega$.cm)$^{-1}$ of room temperature conductivity is the SPC poly-Si films. The conductivity activation energies are 0.5~0.6 eV or the 500$\AA$-thick poly-Si films.

• Journal of the Semiconductor & Display Technology
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• v.2 no.4
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• pp.31-35
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• 2003

We present a formation technique of thin film heater for heat transfer components. Thin film structures of Cr-Si have been prepared on top of alumina substrates by magnetron sputtering. More samples of Mo thin films were prepared on silicon oxide and silicon nitride substrates by electron beam evaporation technology. The electrical properties of the thin film structures were measured up to the temperature of $500^{\circ}C$. The thickness of the thin films was ranged to about 1 um, and a post annealing up to $900^{\circ}C$ was carried out to achieve more reliable film structures. In measurements of temperature coefficient of resistance (TCR), chrome-rich films show the metallic properties; whereas silicon-rich films do the semiconductor properties. Optimal composition between Cr and Si was obtained as 1 : 2, and there is 20% change or less of surface resistance from room temperature to $500^{\circ}C$. Scanning electron microscopy (SEM) and Auger electron spectroscopy (AES) were used for the material analysis of the thin films.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.254-255
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• 2012

Interest in nano-crystalline silicon (nc-Si) thin films has been growing because of their favorable processing conditions for certain electronic devices. In particular, there has been an increase in the use of nc-Si thin films in photovoltaics for large solar cell panels and in thin film transistors for large flat panel displays. One of the most important material properties for these device applications is the macroscopic charge-carrier mobility. Hydrogenated amorphous silicon (a-Si:H) or nc-Si is a basic material in thin film transistors (TFTs). However, a-Si:H based devices have low carrier mobility and bias instability due to their metastable properties. The large number of trap sites and incomplete hydrogen passivation of a-Si:H film produce limited carrier transport. The basic electrical properties, including the carrier mobility and stability, of nc-Si TFTs might be superior to those of a-Si:H thin film. However, typical nc-Si thin films tend to have mobilities similar to a-Si films, although changes in the processing conditions can enhance the mobility. In polycrystalline silicon (poly-Si) thin films, the performance of the devices is strongly influenced by the boundaries between neighboring crystalline grains. These grain boundaries limit the conductance of macroscopic regions comprised of multiple grains. In much of the work on poly-Si thin films, it was shown that the performance of TFTs was largely determined by the number and location of the grain boundaries within the channel. Hence, efforts were made to reduce the total number of grain boundaries by increasing the average grain size. However, even a small number of grain boundaries can significantly reduce the macroscopic charge carrier mobility. The nano-crystalline or polymorphous-Si development for TFT and solar cells have been employed to compensate for disadvantage inherent to a-Si and micro-crystalline silicon (${\mu}$-Si). Recently, a novel process for deposition of nano-crystralline silicon (nc-Si) thin films at room temperature was developed using neutral beam assisted chemical vapor deposition (NBaCVD) with a neutral particle beam (NPB) source, which controls the energy of incident neutral particles in the range of 1~300 eV in order to enhance the atomic activation and crystalline of thin films at room temperature. In previous our experiments, we verified favorable properties of nc-Si thin films for certain electronic devices. During the formation of the nc-Si thin films by the NBaCVD with various process conditions, NPB energy directly controlled by the reflector bias and effectively increased crystal fraction (~80%) by uniformly distributed nc grains with 3~10 nm size. The more resent work on nc-Si thin film transistors (TFT) was done. We identified the performance of nc-Si TFT active channeal layers. The dependence of the performance of nc-Si TFT on the primary process parameters is explored. Raman, FT-IR and transmission electron microscope (TEM) were used to study the microstructures and the crystalline volume fraction of nc-Si films. The electric properties were investigated on Cr/SiO2/nc-Si metal-oxide-semiconductor (MOS) capacitors.

• Korean Journal of Materials Research
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• v.5 no.2
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• pp.203-207
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• 1995

Polysilicon this film transistors (poly-Si TFTs) with different channel dimensions were fabricated on low-temperature crystalized amorphous silicon films and on as-deposited polysilicon films. The electrical characteristics of these TFTs were characterized and compared. The performance of the TFTs fabricated on the solid-phase crystalized amophous silicon films ws showon to be superior to that of the TFTs fabricated on the as-deposited polysilicon films. It was found that the performance of poly-Si TFTs depends strongly on the material characteristics of the polysilicon films used as the active layers, but only weakly on the channel dimensions.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.387-390
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• 2002

This paper presents deposition and characterizations of microcrystalline silicon(${\mu}$c-Si:H) films prepared by hot wire chemical vapor deposition at substrate temperature below 300$^{\circ}C$. The SiH$_4$ concentration[F(SiH$_4$)/F(SiH$_4$).+(H$_2$)] is critical parameter for the formation of Si films with microcrystalline phase. At 6% of silane concentration, deposited intrinsic ${\mu}$c-Si:H films shows sufficiently low dark conductivity and high photo sensitivity for solar cell applications. P-type ${\mu}$c-S:H films deposited by Hot-Wire CVD also shows good electrical properties by varying the rate of B$_2$H$\_$6/ to SiH$_4$ gas. The solar cells with structure of Al/nip ${\mu}$c-Si:H/TCO/g1ass was fabricated with single chamber Hot-Wire CVD. About 3% solar efficiency was obtained and applicability of HWCVD for thin film solar cells was proven in this research.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07b
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• pp.964-967
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• 2002

The effectiveness of silicon nitride SiNx surface passivation is investigated and quantified. This study adopted single-layer antireflection (SLAR) coating of SiNx for efficiency improvement of solar cell. The silicon nitride films were deposited by means of plasma enhanced chemical vapor deposition (PECVD) in planar coil reactor. The process gases used were pure ammonia and a mixture of silane and helium. The thickness and the refractive index on the films were measured by ellipsometry and chemical bonds were determined by using an FT-IR equipment. This films obtained were analyzed in term of hydrogen content, refractive index for gas flow ratio $(NH_3/SiH_4)$, and efficiency of solar cell. The polycrystalline silicon solar cells passivated by silicon nitride shows efficiency above 12.8%.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.52-52
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• 2011

A novel deposition process for n-type nanocrystalline silicon (n-type nc-Si) thin films at room temperature has been developed by adopting the neutral beam assisted chemical vapor deposition (NBa-CVD). During formation of n-type nc-Si thin film by the NBa-CVD process with silicon reflector electrode at room temperature, the energetic particles could induce enhance doping efficiency and crystalline phase in polymorphous-Si thin films without additional heating on substrate; The dark conductivity and substrate temperature of P-doped polymorphous~nano crystalline silicon thin films increased with increasing the reflector bias. The NB energy heating substrate(but lower than $80^{\circ}C$ and increase doping efficiency. This low temperature processed doped nano-crystalline can address key problem in applications from flexible display backplane thin film transistor to flexible solar cell.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.173-176
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• 2004

Silicon thin films on p-type(100) silicon substrate have been prepared by a pulsed laser deposition(PLD) technique using a Nd:YAG laser. The pressure of the environmental gas during deposition was 1 Torr. After deposition, silicon thin film has been annealed in nitrogen ambient. Strong blue photoluminescence(PL) has been observed at room temperature. We report the optical properties of silicon thin films with the variation of the deposition parameters.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.4
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• pp.101-104
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• 2018

An electric field was applied to a Mo conductive layer in the sandwiched structure of $glass/SiO_2/Mo/SiO_2/a-Si$ to induce Joule heating in order to generate the intense heat needed to carry out the crystallization of amorphous silicon. Polycrystalline silicon was produced via Joule heating through a solid state transformation. Blanket crystallization was accomplished within the range of millisecond, thus demonstrating the possibility of a new crystallization route for amorphous silicon films. The grain size of JIC poly-Si can be varied from few tens of nanometers to the one having the larger grain size exceeding that of excimer laser crystallized (ELC) poly-Si according to transmission electron microscopy. We report here the blanket crystallization of amorphous silicon films using the $2^{nd}$ generation glass substrate.