• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.38 no.7
• /
• pp.513-519
• /
• 2001

We proposed Si-rich tungsten silicide (WSix) films for alternate gate electrode of deep-submicron MOSFETs. The investigation of WSix films deposited directly on SiO$_2$ indicated that the annealing of as-deposited films using a rapid thermal processor (RTP) results in low resitivity, as well as negligible fluorine (F) diffusion. Specifically, the resitivity of RTP-annealed samples at 800 $^{\circ}C$ for 3 minutes in vacuum was ~160 $\mu$$\Omega$ . cm, and the irregular growth of an extra SiO$_2$ layer due to F diffusion during annealing has not been observed. In addition, the analysis of the WSix-SiO$_2$-Si (MOS) capacitors exhibits excellent electrical characteristics.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.22 no.9
• /
• pp.717-723
• /
• 2009

Ni/Al ('/' denotes deposition sequence) contacts were deposited on Al-implanted 4H-SiC for ohmic contact formation, and the conduction properties were characterized and compared with those of Ni-only contacts. The thicknesses of the Ni and Al thin film were 30 nm and 300 nm, respectively, and the films were sequentially deposited bye-beam evaporation without vacuum breaking. Rapid thermal anneal (RTA) temperature was varied as follows : $840^{\circ}C$, $890^{\circ}C$, and $940^{\circ}C$. The specific contact resistivity of the Ni contact was about $^{\sim}2\;{\pm}\;10^{-2}\;{\Omega}{\cdot}cm^2$, However, with the addition of Al overlayer, the specific contact resistivity decreased to about $^{\sim}2\;{\pm}\;10^{-4}\;{\Omega}{\cdot}cm^2$, almost irrespective of RTA temperature. X-ray diffraction (XRD) analysis of the Ni contact confirmed the existence of various Ni silicide phases, while the results of Ni/Al contact samples revealed that Al-contaning phases such as $Al_3Ni$, $Al_3Ni_2$, $Al_4Ni_3$, and $Ab_{3.21}Si_{0.47}$ were additionally formed as well as the Ni silicide phases. Energy dispersive spectroscopy (EDS) spectrum showed interfacial reaction zone mainly consisting of Al and Si at the contact interface, and it was also shown that considerable amounts of Si and C have diffused toward the surface. This indicates that contact resistance lowering of the Ni/Al contacts is related with the formation of the formation of interfacial reaction zone containing Al and Si. From these results, possible mechanisms of contact resistance lowering by the addition of Al were discussed.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.31A no.8
• /
• pp.80-90
• /
• 1994

The ultra shallow junction was formed by 2-step RTP. Phosphorus solid source(P$_{2}O_{5}$) was transfered on wafer surface during RTG(Rapid Thermal Glass Transfer) of which process condition was 80$0^{\circ}C$ and 60sec. The process temperature and time of the RTD(Rapid Thermal Diffusion) were 950~105$0^{\circ}C$ during 5~15sec respectively sheet resistances were measured as 175~320$\Omega$/m and junction depth and dopth and dopant surface concentration were measured as 0.075~0.18$\mu$m and 5${\times}10^{19}cm^{4}$ respectively. Ti-silicide was formed by 2-step RTA after 300$\AA$ Titanium was deposited. The 1st RTA (2nd RTA) was carried out at the temperature of $600^{\circ}C$(700~80$0^{\circ}C$) for 30 seconds (10~60 seconds) under N$_2$ ambient. Sheet resistances after 2nd RTA were measured as 46~63$\Omega$/D. Si/Ti component ratio was evaulated as 1.6~1.9 from Auger depth profile. Ti-Silicided n-p junction diode (pattern size : 400$\times$400$\mu$m) was fabricated under the RTD(the process was carried out at the temperature of 100$0^{\circ}C$ for 10seconds) and 2nd RTA(theprocess was carried out at the temperature of 750$^{\circ}C$ for 60 seconds). Leakage current was measured 1.8${\times}10^{7}A/mm^{2}$ at 5V reverse voltage. Whent the RTD process condition is at the temperature of 100$0^{\circ}C$ for 10seconds and the 2nd RTA process condition is at the temperature of 75$0^{\circ}C$ for 60 seconds leakage current was 29.15${\times}10^{9}A$(at 5V).

• Proceedings of the International Microelectronics And Packaging Society Conference
• /
• 2002.11a
• /
• pp.73-77
• /
• 2002

Characteristics of Cu/Si/Cu ohmic contacts to n-type 4H-SiC were investigated systematically. The ohmic contacts were formed by rf sputtering of multi layer Cu/Si/Cu sputtered sequentially. The annealings were peformed With 2-Step using RTP in vacuum ambient. The specific contact resistivity($\rho$c), sheet resistance(Rs), contact resistance(Rc), transfer length(L$_{T}$) were calculated from resistance(R$_{T}$) versus contact spacing(d) measurements obtained from TLM(transmission line method) structure. Best results were obtained for a sample annealed at vacuum as $\rho$c = 1.0x10$^{-6}$ $\Omega$$\textrm{cm}^2$, Rc = 2$\Omega$ and L$_{T}$ = 1${\mu}{\textrm}{m}$. The physical properties of contacts were examined using XRO and AES. The results showed that copper silicide was formed on SiC and Cu was migrated into SiC.o SiC.

• Korean Journal of Materials Research
• /
• v.14 no.5
• /
• pp.310-314
• /
• 2004

Mechanical alloying (MA) of Ti-50.0～66.7at%Si powders was carried out in a high-energy ball mill, and in situ thermal analysis was also made during MA. In order to classify the synthesis behavior of the powders with respect to at%Si, the synthesis behavior during MA was investigated by in situ thermal analysis and X-ray diffraction (XRD). In situ thermal analysis curves and XRD patterns of Ti-50.0～59.6at%Si powders showed that there were exothermic peaks during MA, indicating TiSi, $TiS_2$, and $Ti_{5}$ $Si_4$ phase formation by a rapid exothermic reaction of self-propagating high-temperature synthesis (SHS). Those of Ti-59.8～66.7 at%Si powders, however, showed that there were no peaks during MA, indicating any Ti silicide was not synthesised until MA 240 min. For Ti-50.0～59.6at%Si powders, the critical milling times for SHS increased from 34.5 min to 89.5 min and the temperature rise, $\Delta$T (=peak temperature-onset temperature) decreased form $26.2^{\circ}C$ to $17.1^{\circ}C$ as at%Si increased. The critical composition of Si for SHS reaction was found to be 59.6at% and the critical value of the negative heat of formation of Ti-59.6at%Si to be -1.48 kJ/g.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.06a
• /
• pp.192-193
• /
• 2007

An evaporated Ti/Pd/Ag contact system is most widely used to make high-efficiency silicon solar cells, however, the system is not cost effective due to expensive materials and vacuum techniques. Commercial solar cells with screen-printed contacts formed by using Ag paste suffer from a low fill factor and a high shading loss because of high contact resistance and low aspect ratio. Low-cost Ni and Cu metal contacts have been formed by using electro less plating and electroplating techniques to replace the Ti/Pd/Ag and screen-printed Ag contacts. Ni/Cu alloy is plated on a silicon substrate by electro-deposition of the alloy from an acetate electrolyte solution, and nickel-silicide formation at the interface between the silicon and the nickel enhances stability and reduces the contact resistance. It was, therefore, found that nickel-silicide was suitable for high-efficiency solar cell applications. Cu was electroplated on the Ni layer by using a light induced plating method. The Cu electroplating solution was made up of a commercially available acid sulfate bath and additives to reduce the stress of the copper layer. In this paper, we investigated low-cost Ni/Cu contact formation by electro less and electroplating for crystalline silicon solar cells.

• Korean Journal of Metals and Materials
• /
• v.49 no.4
• /
• pp.321-328
• /
• 2011

The 30 nm-thick Ni layers was deposited on a flexible polyimide substrate with an e-beam evaporation. Subsequently, we deposited a Si layer using a catalytic CVD (Cat-CVD) in a hydride amorphous silicon (${\alpha}$-Si:H) process of $T_{s}=180^{\circ}C$ with varying thicknesses of 55, 75, 145, and 220 nm. The sheet resistance, phase, degree of the crystallization, microstructure, composition, and surface roughness were measured by a four-point probe, HRXRD, micro-Raman spectroscopy, FE-SEM, TEM, AES, and SPM. We confirmed that our newly proposed Cat-CVD process simultaneously formed both NiSi and crystallized Si without additional annealing. The NiSi showed low sheet resistance of < $13{\Omega}$□, while carbon (C) diffused from the substrate led the resistance fluctuation with silicon deposition thickness. HRXRD and micro-Raman analysis also supported the existence of NiSi and crystallized (>66%) Si layers. TEM analysis showed uniform NiSi and silicon layers, and the thickness of the NiSi increased as Si deposition time increased. Based on the AES depth profiling, we confirmed that the carbon from the polyimide substrate diffused into the NiSi and Si layers during the Cat-CVD, which caused a pile-up of C at the interface. This carbon diffusion might lessen NiSi formation and increase the resistance of the NiSi.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2000.02a
• /
• pp.173-173
• /
• 2000

Multilayered films (MLF) consisting of transition metals and semiconductors have drawn a great deal of interest because of their unique properties and potential technological applications. Fe/Si MLF are a particular topic of research due to their interesting antiferromagnetic coupling behavior. although a number of experimental works have been done to understand the mechanism of the interlayer coupling in this system, the results are controversial and it is not yet well understood how the formation of an iron silicide in the spacer layers affects the coupling. The interpretation of the coupling data had been hampered by the lack of knowledge about the intermixed iron silicide layer which has been variously hypothesized to be a metallic compound in the B2 structure or a semiconductor in the more complex B20 structure. It is well known that both magneto-optical (MO0 and optical properties of a metal depend strongly on their electronic structure that is also correlated with the atomic and chemical ordering. In order to understand the structure and physical properties of the interfacial regions, Fe/Si multilayers with very thin sublayers were investigated by the MO and optical spectroscopies. The Fe/si MLF were prepared by rf-sputtering onto glass substrates at room temperature with a totall thickness of about 100nm. The thicknesses of Fe and Si sublayers were varied from 0.3 to 0.8 nm. In order to understand the fully intermixed state, the MLF were also annealed at various temperatures. The structure and magnetic properties of Fe/Si MLF were investigated by x-ray diffraction and vibrating sample magnertometer, respectively. The MO and optical properties were measured at toom temperature in the 1.0-4.7 eV energy range. The results were analyzed in connection with the MO and optical properties of bulk and thin-film silicides with various structures and stoichiometries.

• Korean Journal of Materials Research
• /
• v.8 no.7
• /
• pp.621-627
• /
• 1998

The formation of Co-silicide between Co/Zr bilayer on the amorphous and crystalline Si substrates has been investigated. The films of Zr(50$\AA$) and Co(l50$\AA$) were deposited with e-beam evaporation system and were heattreated with the rapid thermal annealing system at the temperatures between 50$0^{\circ}C$ and 80$0^{\circ}C$ with 10$0^{\circ}C$ increments for 30 seconds. The phase identification of Co-silicide was carried out by XRD and the chemical analysis was examined by AES and RBS. The interface morphologies of Co/Zr bilayer films were investigated by cross sectional TEM and HRTEM. $CoSi_2$ was formed epitaxially on the crystalline Si substrate above $700^{\circ}C$ while polycrystalline $CoSi_2$ was grown on the amorphous Si substrate. The formation temperature of Co-silicide on the amorphous Si substrate was about 100 C lower than that on the crystalline Si. The COzSi phase was not identified on the both Si substrates. The formation temperature of first phase of Co-silicide on ColZr bilayer was higher than that on Co mono layer. CoSizlayer formed on the amorphous Si substrate exhibits better uniformity compared to the CoSiz formed on the crystalline substrate. The sheet resistance of CoSiz layer on crystalline Si was lower than that on the amorphous Si at high temperatures.tures.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.24 no.12
• /
• pp.1010-1017
• /
• 2011

The use of plated front contact for metallization of silicon solar cell may alternative technologies as a screen printed and silver paste contact. This technologies should allow the formation of contact with low contact resistivity a high line conductivity and also reduction of shading losses. A selective emitter structure with highly dopes regions underneath the metal contacts, is widely known to be one of the most promising high-efficiency solution in solar cell processing. When fabricated Ni/Cu plating metallization cell with a selective emitter structure, it has been shown that efficiencies of up to 18% have been achieved using this technology.