• Title/Summary/Keyword: signal processor

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A Design of Superscalar Digital Signal Processor (다중 명령어 처리 DSP 설계)

  • Park, Sung-Wook
    • Journal of the Korean Institute of Intelligent Systems
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    • v.18 no.3
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    • pp.323-328
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    • 2008
  • This paper presents a Digital Signal Processor achieving high through-put for both decision intensive and computation intensive tasks. The proposed processor employees a multiplier, two ALU and load/store. Unit as operational units. Those four units are controlled and works parallel by superscalar control scheme, which is different from prior DSP architecture. The performance evaluation was done by implementing AC-3 decoding algorithm and 37.8% improvement was achieved. This study is valuable especially for the consumer electronics applications, which require very low cost.

A Programmable Doppler Processor Using a Multiple-DSP Board (다중 DSP 보드를 이용한 프로그램 가능한 도플러 처리기)

  • 신현익;김환우
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.40 no.5
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    • pp.333-340
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    • 2003
  • Doppler processing is the heart of pulsed Doppler radar. It gives a clutter elimination and coherent integration. With the improvement of digital signal processors (DPSs), the implementation using them is more widely used in radar systems. Generally, so as for Doppler processor to process the input data in real time, a parallel processing concept using multiple DSPs should be used. This paper implements a programmable Doppler processor, which consists of MTI filter, DFB and square-law detector, using 8 ADSP21060s. Formulating the distribution time of the input data, the transfer time of the output data and the time required to compute each algorithm, it estimates total processing time and the number of required DSP. Finally, using the TSG that provides radar control pulses and simulated target signals, performances of the implemented Doppler processor are evaluated.

A Development of the High-Performance Signal Processor for the Compact Millimeter Wave Radar (소형 밀리미터파 레이더를 위한 고성능 신호처리기 개발)

  • Choi, Jin-Kyu;Ryu, Han-Chun;Park, Seung-Wook;Kim, Ji-Hyun;Kwon, Jun-Beom
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.17 no.6
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    • pp.161-167
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    • 2017
  • Recently, small radar has been reduced in size and power consumption to cope with various operating environments. It also requires the development of a small millimeter wave radar with high range resolution to disable the system of target with a single strike. In this paper, we design and implement a signal processor that can be used in small millimeter wave radar. The signal processor for the small millmeter wave radar is designed with a digital IF(Intermediate Frequency) receiver and DFT(Discrete Fourier Transform) module capable of real time FFT operation for miniaturization and low power consumption. Also it was to leverage the FPGA(Field Programmable Gate Array) and DAC(Digital Analog Converter) as a means for correcting the distortion of signals that can occur in the receive path of the small millimeter wave radar to create a RF signal that is used by the system. Finally, we verified the signal processor presented through performance test

Development and Basic Experiment of Active Noise Control System for Reduction of Road Noise (도로 소음 저감을 위한 능동소음제어 시스템의 개발 및 기초실험)

  • Moon, Hak Ryong;Kang, Won Pyoung;Lim, You Jin
    • International Journal of Highway Engineering
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    • v.15 no.6
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    • pp.41-47
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    • 2013
  • PURPOSES : The purpose of this study is about noise which is generated from roads and is consist of irregular frequency variation from low frequency to various band. The existing methods of noise reduction are sound barrier that uses insulation material and absorbing material or have applied passive technology of noise reduction by devices. The total frequency band is needed to apply active noise control. METHODS : In this study applies to the field of road traffic environment, signal processing controller and various analog signal input/output, the amplifier module is based on parallel-core embedded processor designed. DSP performs the control algorithm of the road traffic noise. Noise sources in the open space performance of evaluation were applied. In this study, controller of active signal processor was designed based on the module of audio input/output and main controller of embedded process. The controller of active signal processor operates noise reduction algorithm and performance tests of noise reduction in inside and outside environment were executed. RESULTS : The signal processing controller with OMAP-L137 parallel-core processors as the center, DSP processors in the active control operations dealt with quickly. To maximize the operation speed of an object and ARM processor is external function keys and display for functions and evaluating the performance management system was designed for the purpose of the interface. Therefore the reduction of road traffic noise has established an electronic controller-based noise reduction. CONCLUSIONS : It is shown that noise reduction is effective in the case of pour tonal sound and complex tonal sound below 500Hz by appling to Fx-LMS.

3-Way 32 bit VLIW Multimedia Signal Processor

  • Park, Jaebok;Jaehee You
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.97-100
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    • 2001
  • A 3-way VLIW multimedia signal processor capable of efficient repeated operations as well as both load/store and type transformations for various data types is presented. It is composed of a 32-bit execution unit that can execute two instructions in parallel, an independent load/store unit and a control unit. The processor is implemented with 0.6${\mu}{\textrm}{m}$ gate array and the results are discussed.

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Electronic Processor Design for Thermal Imager with Serial/Parallel Scan type (직병렬 주사방식 일정장비의 신호처리기 설계 연구)

  • 송인섭;유위경;윤은석;홍영철;홍석민
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.1
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    • pp.49-56
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    • 1994
  • This paper describes the design principles and methods of electronic processor for thermal imager with the SPRITE detector, operating in the 8-12 micron band. The thermal imager consists of a optical scanner containing the detector and an electrical signal processor. The optical scanner utilizing rotating polygon and oscillating mirror, is 2-dimensional serial/parallel scan type using 5 elements of the detector. And the electronic processor has pre-processing of 5 chnanel's thermal signal from the detector, and performs digital scan conversion to reform the parallel data stream into serial analog data compatible with conventional RS-170 video. Through the designed electronic processor, we have acquired a satisfactory thermal image. And the MRTD (Minimum Resolvable Temperature Difference) is 0.5$^{\circ}$K at 7.5 cycles/mm.

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Post-processor Simulator Construction of Ultrasonic Signals for Integrity Evaluation of Railway Truck (대차 프레임의 건전성평가를 위한 초음파신호 후처리기 시뮬레이터 구축)

  • 이규배;윤인식
    • Journal of the Korean Society for Railway
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    • v.5 no.2
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    • pp.55-60
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    • 2002
  • This study proposes the post-processor simulator construction of ultrasonic signal for integrity evaluation of railway truck. For these purposes, the ultrasonic signals for defects(crack) of weld zone in frames are acquired in the type of time series data and echo strength. The detection of the natural defects in railway truck is performed using the characteristics of echodynamic pattern in ultrasonic signal. The constructed post-processor simulator agree fairly well with the measured results of test block(defect location, beam propagation distance, echo strength, etc). Proposed post-processor simulator construction of ultrasonic in this study can be used for the integrity evaluation of railway truck.

Design of a Simple 8-Bit Processor Using HDL (HDL을 이용한 간략형 8-Bit 프로세서의 설계)

  • 송호정;송기용
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2000.12a
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    • pp.241-244
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    • 2000
  • In this paper we designed a simple 8-bit processor using HDL. The simple 13-bit processor has 19 instructions with three different addressing modes. The processor includes registers - IR, PC, SP, Y, MA, MD, AC, IN, OUT - and 256Kbyte memory. We examined the operation of the processor through simulation and then synthesized it on FPGA.

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A Helicopter-borne Pulse Doppler Radar Signal Processor Development (헬기탑재 펄스 도플러 레이다 신호처리기 개발)

  • Kwag, Young-Kil;Jeun, In-Pyung;Choi, Min-Su;Hwang, Gwang-Yeon;Lee, Kang-Hoon;Lee, Jae-Ho
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.443-446
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    • 2005
  • This paper presents the results of the design and implementation of the airborne pulse doppler radar signal processor using high multi-DSP for the multi-function radar capability such as short-range, midium-range, and long-range depending on the mission of the vehicle. Particularly, the radar signal processor is developed using two DSP boards in parallel for the various radar signal processing algorithm. The key algorithms include LFM chirp waveform-based pulse compression, MTI clutter filter, MTD processor, adaptive CFAR, and clutter map. Especially airborne moving clutter Doppler spectrum compensation algorithm such as TACCAR is implemented for the multi-mode airborne radar system. The test results shows the good Doppler spectral separation for the clutter and the moving target in the flight test environment using helicopter

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A Helicopter-borne Pulse Doppler Radar Signal Processor Development using High Speed Multi-DSP (고속 Multi-DSP를 이용한 헬기탑재 펄스 도플러 레이다 신호처리기 개발)

  • Kwag, Young-Kil;Choi, Min-Su;Jeun, In-Pyung;Hwang, Gwang-Yeon;Lee, Kang-Hoon;Lee, Jae-Ho
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2005.11a
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    • pp.23-28
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    • 2005
  • An airborne radar is an essential aviation electronic system of the helicopter to perform various missions in all-weather environments. This paper presents the results of the design and implementation of the airborne pulse doppler radar signal processor using high multi-DSP for the multi-function radar capability such as short-range, midium-range, and long-range depending on the mission of the vehicle. Particularly, the radar signal processor is developed using two DSP boards in parallel for the various radar signal processing algorithm. The key algorithms include LFM chirp waveform-based pulse compression, MTI clutter filter, MTD processor, adaptive CFAR, and clutter map. Especially airborne moving clutter Doppler spectrum compensation algorithm such as TACCAR is implemented for the multi-mode airborne radar system. The test results shows the good Doppler spectral separation for the clutter and the moving target in the flight test environment using helicopter.

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