• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.332-333
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• 2018

This paper presents an advanced abnormal over-current protection with $SuperFET^{(R)}$ 800V MOSFET in Flyback converter. In advanced abnormal over-current protection, digital pattern generator is proposed to detect a steep di/dt current condition when secondary rectifier diode or the transformer is shorted. If current sensing signal is larger than current limit during consecutive switching cycle, Gate signal will be stopped for 7 internal switching periods. If the abnormal over-current maintains pattern, the controller goes into protection mode. The Advanced over-current protection has been implemented in a 0.35um BCDMOS process (ON Semiconductor process).

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.706-711
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• 2014

A low power 6-bit flash ADC that uses an input voltage range detection algorithm is described. An input voltage level detector circuit has been designed to overcome the disadvantages of the flash ADC which consume most of the dynamic power dissipation due to comparators array. In this work, four digital input voltage range detectors are employed and each input voltage range detector generates the specific clock signal only if the input voltage falls between two adjacent reference voltages applied to the detector. The specific clock signal generated by the detector is applied to turn the corresponding latched comparators on and the rest of the comparators off. This ADC consumes 68.82 mW with a single power supply of 1.2V and achieves 4.3 effective number of bits for input frequency up to 1 MHz at 500 MS/s. Therefore it results in 4.6 pJ/step of Figure of Merit (FoM). The chip is fabricated in 0.13-um CMOS process.

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.785-787
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• 2005

This paper addresses the small-signal analysis of the multi-phase interleaved boost converter with the coupled inductors operated in the continuous inductor current mode. The generalized and analytical expressions for the transfer functions of interest are derived for various inductor couplings. The dynamic characteristics are analyzed according to the inductor couplings and verified experimentally. The proposed frequency models will be very useful to design the dynamic controllers of the multi-phase interleaved boost converters.

• Proceedings of the KIEE Conference
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• 2000.07b
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• pp.1321-1323
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• 2000

Sigma-delta modulation can perform A/D conversion with a high-resolution. It is useful for simplifing the system and spreading out inband signal noise. When the sigma-delta modulation is applied to a switching converter, it can suppress the harmonic frequencies of output signal and be realized with a simple structure. In this paper, some methods of sigma-delta modulation are discussed so as to find the suitable structure for a switching converter. Noise characteristics are calculated and analyzed through simulations.

• Proceedings of the Korean Society of Computer Information Conference
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• 2015.07a
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• pp.193-195
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• 2015

본 연구에서는 시스템 내부에 존재하는 불확실성에 대하여 안정성을 만족하는 입력신호 V, I, R, PWM의 신호를 사용자가 선택하는 신호로 변환하여 출력할 수 있는 신호변환기의 성능 및 설계방법을 연구 한다. 본 연구에서는 시간지연이 존재하는 신호변환기를 안정된 입/출력을 수행하여 나타나는 V, I, R, PWM 신호의 시간지연의 영향을 고려한 설계와 그 성능을 평가해 보았다.

• Proceedings of the KIEE Conference
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• 1993.07a
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• pp.450-452
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• 1993

In this study, a method is suggested to design the A/D conversion system which has high resolution to convert load cell signal. First, hardware was designed to reduce the offset voltage of integrator and comparator. And then, a calibration software technique was performed to obtain the stable data from A/D converter. The optimal parameters of each elements in the circuits was selected using the SPICE simulation. The main advantage of our method is high precision A/D converter can be constructed with low cost and high confidence. Therefore proposed method is expected to be used in the industrial field where a high precision measurement is required.

• Proceedings of the KIPE Conference
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• 1996.06a
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• pp.85-88
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• 1996

New power factor correction(PFC) technique based on the averaged model of boost converter is proposed. Without measurement of input current, power factor correction scheme derived from the averaged model is presented. With the measurements of input voltage and output voltage, the control signal is generated to make the shape of the line current same as the input voltage. The characteristics of input line current distortion is analyzed by considering the generation of duty cycle.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.654-657
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• 1998

This paper is described a digital implementation of a pulse area modulation (PAM) method for a unity-power-factor buck-boost converter. A digital controller is designed and implemented by a Digital Signal Processor(DSP) to replace the analog control circuit for PAM. Experimental results are presented and compared with simulations.

• Proceedings of the KIPE Conference
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• 1998.07a
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• pp.54-57
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• 1998

This paper describes a digital implementation of a pulse amplitude modulation(PAM) method for a unity-power-factor buck-booster converter. A digital controller is designed and implemented by a Digital Signal Processor(DSP) to replace the analog control circuit for PAM. Experimental results are presented and compared with simulations.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.533-537
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• 2002

A fast time domain modeling and simulation is performed for the input-series-output-parallel connected 2-switch forward converter Steady-state and large-signal transient responses due to a step load change are simulated. The simulation results are verified through experiments.