• 한국전기전자재료학회논문지
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• 제14권6호
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• pp.518-524
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• 2001

We report the current limiting properties of superconducting fault current limiters (SFCL). Our SFCL was patterned in a spiral type on a YB $a_2$C $u_3$$O_{7-x}$(YBCO) film deposited using rf sputtering techniques and was coated with a gold shunt layer in order to disperse the heat generated at hot spots in the YBCO film. Current increased up to 13.5 $A_{peak}$ at 60 Hz for the voltage of 13 $V_{peak}$, which is the minimum quench point, and increased up to 17.6 $A_{peak}$ at 60 Hz fo the voltage fo 141.4 $V_{peak}$. The quench completion time was 5 msec at 13 $V_{peak}$ and 4 msec at 141. $V_{peak}$ respectively. we think that this architecture using spiral-type SFCL can be useful for the protection of the power delivery systems from fault currents.s. currents.s.

• 대한전기학회논문지:전력기술부문A
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• 제49권8호
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• pp.418-423
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• 2000

In this paper, we reported the current limiting properties of superconducting fault current limiters (SFCL). Our SFCL was patterned in a coil-type on a YBCO film deposited using rf sputtering techniques and was coated with a gold shunt layer in order to disperse the heat generated at hot spots in the YBCO film. Current increased up to 13.5 Apeak at 60 Hz for the voltage of 11.5 Vpeak, which is the minimum quench point, and increased up to 17.6 Apeak at 60 Hz for the voltage of 80 Vpeak. The quench completion time was 5 msec at 11.5 Vpeak and 4 msec at 80 Vpeak respectively. We think that this architecture using coil-type SFCL can be useful for the protection of the power delivery systems from fault currents.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1992년도 춘계학술대회 논문집
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• pp.105-109
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• 1992

ITO film, 1500${\AA}$ of thickness, onto glass and p-InP wafer was prepared by e-beam evaporator. The bet ITO film had the resistivity 5.3${\times}$10$\^$-3/ $\Omega$-cm, the concentration 6.5${\times}$10$\^$20/cm$\^$-3/, the transmittance above 80%, and the optical energy gap about 3.5eV. The higher pressure of injected oxygen, the less reverse bias saturation current and the more open circuit voltage. Under the optimum evaporation conditions, the efficiency was 7.19% and the series resistance, and the shunt resistance were respectively 8.5%, 3${\alpha}$, and 26K$\Omega$. The interdependence between activation energy and pre-exponential factor was found. We found he surface of the p-InP became n-type and consquently supposed that the buried homojunction formation, that is, n+-ITO/n-InP/p-InP was caused by Sn diffusion or loss of phosphorus in the interface layer.

• Journal of the Korean Physical Society
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• 제73권11호
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• pp.1794-1798
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• 2018

We have grown famatinite $Cu_3SbS_4$ films by using sulfurization of Cu/Sb stack film. Sulfurization at $500^{\circ}C$ produced famatinite $Cu_3SbS_4$ phase, while $400^{\circ}C$ and $450^{\circ}C$ sulfurization exhibited unreacted and mixed phases. The fabricated $Cu_3SbS_4$ film showed S-deficiency, and secondary phase of $Cu_{12}Sb_4S_{13}$. The secondary phase was confirmed by X-ray diffraction, Raman spectroscopy, photoluminescence and external quantum efficiency measurements. We have also fabricated solar cell in substrate type structure, ITO/ZnO/(Zn,Sn)O/$Cu_3SbS_4$/Mo/glass, where $Cu_3SbS_4$ was used as a absorber layer and (Zn,Sn)O was employed as a Cd-free buffer. Our best cell showed power conversion efficiency of 0.198%. Characterization results of $Cu_3SbS_4$ absorber indicates deep defect (due to S-deficiency) and low shunt resistance (due to $Cu_{12}Sb_4S_{13}$ phase). Thus in order to improve the cell efficiency, it is required to grow high quality $Cu_3SbS_4$ film with no S-deficiency and no secondary phase.

• 한국전자파학회논문지
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• 제24권11호
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• pp.1104-1112
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• 2013

본 논문에서는 감지기에서 특정 거리만큼 떨어진 곳에 버블 형태의 감지 영역을 형성하는 새로운 버블형 동작 감지기를 위해 나노초의 발진 기동 시간과 8.35 GHz의 중심주파수를 가지는 광대역 콜피츠 전압제어발진기를 설계 및 제작하였다. 전압제어발진기는 HEMT 소자 및 콜피츠 궤환 구조를 이용한 부성 저항부와 바랙터 다이오드 및 단락된 마이크로스트립 분기 선로를 이용한 공진부로 구성되었다. 패키지된 트랜지스터의 기생 인덕턴스로 인해 8.1 GHz에서 용량성 값에서 유도성 값으로 변하는 부성 저항부의 리액턴스 변화는 마이크로스트립 분기 선로와 직렬 캐패시터를 이용하여 보상하였다. 부성 저항 값을 결정하는 궤환 캐패시터들의 값을 조정함으로써 부성 저항 값 변화에 따른 발진 기동 시간 개선 여부와 부성 저항부의 입력 리액턴스 기울기 변화에 따른 대역폭 개선 여부도 조사되었다. 제작된 전압제어발진기는 2.3 GHz(28 %)의 튜닝 대역폭과 4.1~7.5 dBm의 출력 전력, 그리고 2 nsec 이하의 발진 기동 시간을 가지는 것으로 측정되었다.

• 한국초전도학회:학술대회논문집
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• 한국초전도학회 1999년도 High Temperature Superconductivity Vol.IX
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• pp.348-351
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• 1999

Cold 층을 입힌 저항형 초전도 한류기의 전류 제한 특성을 통하여 다음과 같은 결론을 얻었다. 고장발생후 3.2 msec 후에 quench가 발생하였으며, 부분적인 quench가 발생한 다음 시간이 지나면서 완전한 quench로 진행되었다. 즉, 선로고장에 따른 quench 발생 후 YBCO 초전도체의 gold층으로 대부분의 전류가 흐르게 되고, quench 되면서 발생하는 열도 대부분 gold층에서 흡수하여저항이 증가하였으며 이에 따른 전류감소, 전압증가 및 소비전력증가가 발생하였다. 인가전압 V$_0$=65 V$_{peak}$이고 R$_0$는 1 ${\omega}$, 그리고 R$_L$을 7.7 ${\omega}$으로 하였을 때 사고모의 위상각 0$^{\circ}$에서 고장발생후 0.9 msec 후인 9.6 A$_{peak}$ 되는 지점에서 quench가 발생하여 13.0 A$_{peak}$의 최대한류전류값을 보인후 11.4 A$_{peak}$의 전류값에서 fast quench가 완료되었다. 이때 quench 시간은0.63 msec 이었다. 저항값은 gold층에서 발생한 열때문에 점진적인 상승을 보이다가 약 3주기후에 일정한 값에 도달하였다. 한류소자의 온도는 약 11 msec 후에 상온에 도달하였으며, 3 주기후인 54 msec에는 150 $^{\circ}C$까지 상승하였다. gold 박막을 입힌 meander line은 임계전류 이상의 전류를 통전하였을 때에 용단되지 않았으며 ??치된 상태에서 3 사이클 이상 유지하였다. 약65 A$_{rms}$가 흘렀을 때에야 ??치후 3 사이클 지나용단되었다. 이러한 YBCO/gold에 의한 초전도한류기의 용량은 gold에 발생하는 열을 gold가감당할 수 있는 전류의 크기와 관련이 있으며, gold층이 YBCO 한류소자가 quench되었을 때 발생하는 열을 효과적으로 분산시킬 뿐만 아니라 전기적으로 shunt 회로 역할을 하고 있음을 확인할 수 있다. 이에 더하여 앞으로 quench 후 한류소자에서 발생할 수 있는 인덕턴스의 저감방안에 대한 설계 및 모델 탐구를 통하여 좀더 효율적인 한류소자 구성에 대한 연구를 병행하고자 한다.

• Current Photovoltaic Research
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• 제2권1호
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• pp.8-13
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• 2014

ZnSe/$Zn_3P_2$ heterojunctions with a substrate configuration were fabricated using a series of cost-effective processes. Thin films of ZnTe and $Zn_3P_2$ were successively grown by close-spaced sublimation onto Mo-coated glass substrates. ZnSe layers thinner than 100nm were formed by annealing the $Zn_3P_2$ films in selenium vapor. Surface selenization generated a high density of micro-cracks which, along with voids, provided shunt paths and severely deteriorated the diode characteristics. Annealing the $Zn_3P_2$ film at $300^{\circ}C$ in a $ZnCl_2$ atmosphere before surface selenization produced a dense microstructure and prevented micro-crack generation. The mechanism of micro-crack generation by the selenization was described and the suppression effect of $ZnCl_2$ treatment on the micro-crack generation was explained. ZnSe/$Zn_3P_2$ heterojunctions with low leakage current ($J_0$ < $1{\mu}A/cm^2$) were obtained using an optimized surface selenization process with $ZnCl_2$ treatment. However, the series resistance was very high due to the presence of an electrical barrier between the ZnTe and $Zn_3P_2$ layers.

• Current Photovoltaic Research
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• 제7권1호
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• pp.1-8
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• 2019

The $Cu(In,Ga)Se_2$ (CIGS) thin film obtained by two-step process (metal deposition and Se annealing) has a rough surface morphology and many voids at the CIGS/Mo interface. To solve the problem a precursor that contains Se was employer by depositing a (In,Se)/(Cu,Ga) stacked layer. We devised a two-step annealing (vacuum pre-annealing and Se annealing) for the precursor because direct annealing of the precursor in Se environment resulted in the small grains with unwanted demarcation between stacked layers. After vacuum pre-annealing up to $500^{\circ}C$ the CIGS film consisted of CIGS phase and secondary phases including $In_4Se_3$, InSe, and $Cu_9(In,Ga)_4$. The secondary phases were completely converted to CIGS phase by a subsequent Se annealing. A void-free CIGS/Mo interface was obtained by the two-step annealing process. Especially, the CIGS film prepared by vacuum annealing $450^{\circ}C$ and subsequent Se annealing $550^{\circ}C$ showed a densely-packed grains with smooth surface, well-aligned bamboo grains on the top of the film, little voids in the film, and also little voids at the CIGS/Mo interface. The smooth surface enhanced the cell performance due to the increase of shunt resistance.