• Title/Summary/Keyword: shifters

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Broadband $180^{\circ}$ Bit X-band Phase Shifter Using Payallel-Coupled tines (평행 결합선로를 이용한 광대역 $180^{\circ}$ Bit X-대역 위상 변이기의 설계)

  • Sung Gyu-Je;Park Hyun-Sik;Kim Dong-Yen
    • Journal of the Microelectronics and Packaging Society
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    • v.12 no.2 s.35
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    • pp.175-179
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    • 2005
  • A novel, simple and broadband $180^{\circ}$ bit X-band phase shifter was proposed and fabricated in a standard micromachining process. It is composed of two $90^{\circ}$ parallel-coupled lines; one of which is shorted and the other is grounded. Design equations for the proposed $180^{\circ}$ bit phase shifter are derived by the method of even and odd mode analysis. Based on design equations, $180^{\circ}$ bit phase shifter was designed and fabricated to operate from 7 to 13 GHz with ${\pm}5^{\circ}$ of phase deviation.

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Analysis for Performance Enhancement of TMA using Apodized Time Sequence (Apodized 시계열을 사용한 TMA의 성능 향상에 대한 분석)

  • Ho, Kwang-Chun
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.18 no.4
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    • pp.105-109
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    • 2018
  • In this paper, the performance enhancement of a time-modulated array is described. The proposed time-modulated array is based on the topology of a conventional array but uses apodized discrete time switching, instead of phase shifters, to achieve beamforming functions with side-band suppression. Numerical simulations are carried out to examine the performance of this beamforming system based on apodized time sequence of 16 elements linear array. Numerical results reveal that the proposed method provides a more flexible and accurate way of producing desired beampatterns with low or ultralow side-lobe level (SLL) compared with the conventional methods.

A Tailored Investigation for $(Ba,Sr)TiO_3$ FGMs

  • Jeon, Jae-Ho
    • Proceedings of the Korean Powder Metallurgy Institute Conference
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    • 2006.09a
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    • pp.289-290
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    • 2006
  • [ $SrTiO_3$ ] is usually added as shifters in order to move the $T_C$ of $BaTiO_3$ to lower temperatures because it is well established that the $T_C$ of $BaTiO_3$ decreases linearly with a solid solution of $Sr^{+2}$ in place of $Ba^{+2}$. It is not fully understood yet, however, how $SrTiO_3$ influences on the peak value of the dielectric constant $(\varepsilon_{max})$ at the $T_C$ of $BaTiO_3$. This research reports the effect of $SrTiO_3$ addition on εmax at the $T_C$ of $BaTiO_3$ ceramics. Based on the chemical composition and the grain size dependence of the dielectric property of $BaTiO_3$ ceramics, functionally graded $(Ba,Sr)TiO_3$ composites were designed and fabricated. Multi-layered $(Ba,Sr)TiO_3$ composites with a compositional gradient of $SrTiO_3$ exhibited a low temperature coefficient and high dielectric constant in a wide temperature range.

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Localization of Human Motion Using a 8×8 Phased Array Antenna (8×8 위상배열안테나를 이용한 위치추적 시스템)

  • Goh, Hoseok;Han, Heeje;Park, Soonwoo;Kim, Chan-woo;Kim, Hongjoon
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.67 no.9
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    • pp.1197-1201
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    • 2018
  • In this paper, a Doppler radar for a localization of a human motion is demonstrated. In the system, we used a $8{\times}8$ phased array antenna using metamaterial phase shifters for easy and precise control of antenna beam pattern. Scanning area is a circular sector with an inscribed angle of $60^{\circ}$ and a diameter of 45m. This area is divided with 15 designated area and each area is scanned for 0.2 second. When there is a motion in a designated area, we are able to detect a frequency shift due to a Doppler effect. In this way it is possible to detect the location of motion. The experiment shows that 78% of position accuracy. The remaining 22% occurred the surroundings of the designated area.

A Study on Ti:LiNbO3 Integrated Optical Wavelength Tunable Polarization Mode Controllers (Ti:LiNbO3 집적광학형 파장가변 편광모드 조절기에 관한 연구)

  • Moon, Je-Young;Jung, Hong-Sik
    • Korean Journal of Optics and Photonics
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    • v.16 no.4
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    • pp.376-383
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    • 2005
  • We designed and fabricated integrated-optic tunable polarization controllers based on $LiNbO_3$ with the Ti-indiffused waveguide along the y-axis utilizing the electro-optic effect. The device consists of $TE↔TM$ mode converters and TE/TM phase shifters. We analyzed the operation principles of each device utilizing transfer matrices based on a Jones matrix and simulated shifting of the center wavelength by inducing voltage. We confirmed experimentally that the fabricated devices control the tunability of the center wavelength and the input SOP.

LFSR-based PRPG with phase shifters (페이지 쉬프터를 갖는 LFSR기반의 PRPG)

  • Cho, S.J.;Choi, U.S.;Hwang, Y.H.;Kweon, M.J.;Kim, J.G.;Yim, J.M.;Heo, S.H.
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.10a
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    • pp.343-346
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    • 2009
  • Since an LFSR as a pattern generator has solely linear dependency in itself, it generates sequences by moving the bit positions for a pattern generation. So the correlation between the generated patterns is high and thus reduces the possibility of fault detection. To overcome these problems many researchers have studied to have goodness of randomness between the output test patterns. In this paper, we propose the new and effective method to construct phase shifter as PRPG.

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Low Area and High Performance Multi-mode 1D Transform Block Design for HEVC (HEVC를 위한 저면적 고성능 다중 모드 1D 변환 블록 설계)

  • Kim, Ki-Hyun;Ryoo, Kwang-Ki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.1
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    • pp.78-83
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    • 2014
  • This paper suggest an effective idea to implement an low area multi-mode one dimension transform block of HEVC(High Efficiency Video Coding). The time consuming multiplier path is designed to operate on low frequency. Normal multipliers dealing with variable operands are replaced with smaller constant multipliers which do the product with constant coefficient and variable only using shifters and adders. This scheme increases total multiplier counts but entire areas are reduced owing to smaller area of constant multiplier. Idle cycles caused by doubled multipliers enable to use multi-cycle paths on the cycle eating multiplier data path. Operating frequency is lowered by multi-cycle path but total throughput is maintained. This structure is implemented with TSMC 0.18 CMOS process library, and operated on 186MHz frequency to process a 4k($3840{\times}2160$) image. Max operating frequency is 300MHz.

A High-Voltage Compliant Neural Stimulation IC for Implant Devices Using Standard CMOS Process (체내 이식 기기용 표준 CMOS 고전압 신경 자극 집적 회로)

  • Abdi, Alfian;Cha, Hyouk-Kyu
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.5
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    • pp.58-65
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    • 2015
  • This paper presents the design of an implantable stimulation IC intended for neural prosthetic devices using $0.18-{\mu}m$ standard CMOS technology. The proposed single-channel biphasic current stimulator prototype is designed to deliver up to 1 mA of current to the tissue-equivalent $10-k{\Omega}$ load using 12.8-V supply voltage. To utilize only low-voltage standard CMOS transistors in the design, transistor stacking with dynamic gate biasing technique is used for reliable operation at high-voltage. In addition, active charge balancing circuit is used to maintain zero net charge at the stimulation site over the complete stimulation cycle. The area of the total stimulator IC consisting of DAC, current stimulation output driver, level-shifters, digital logic, and active charge balancer is $0.13mm^2$ and is suitable to be applied for multi-channel neural prosthetic devices.

Phase Representation with Linearity for CORDIC based Frequency Synchronization in OFDM Receivers (OFDM 수신기의 CORDIC 기반 주파수 동기를 위한 선형적인 위상 표현 방법)

  • Kim, See-Hyun
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.47 no.3
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    • pp.81-86
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    • 2010
  • Since CORDIC (COordinate Rotation DIgital Computer) is able to carry out the phase operation, such as vector to phase conversion or rotation of vectors, with adders and shifters, it is well suited for the design of the frequency synchronization unit in OFDM receivers. It is not easy, however, to fully utilize the CORDIC in the OFDM demodulator because of the non-linear characteristics of the direction sequence (DS), which is the representation of the phase in CORDIC. In this paper a new representation method is proposed to linearize the direction sequence approximately. The maximum phase error of the linearized binary direction sequence (LBDS) is also discussed. For the purpose of designing the hardware, the architectures for the binary DS (BDS) to LBDS converter and the LBDS to BDS inverse converter are illustrated. Adopting LBDS, the overall frequency synchronization hardware for OFDM receivers can be implemented fully utilizing CORDIC and general arithmetic operators, such as adders and multipliers, for the phase estimation, loop filtering of the frequency offset, derotation for the frequency offset correction. An example of the design of 22 bit LBDS for the T-DMB demodulator is also presented.

Design of High Performance Dual Channel Pipelined Interpolators for H.264 Decoder (이중 채널 파이프라인 구조의 H.264용 고성능 보간 연산기 설계)

  • Lee, Chan-Ho
    • Journal of IKEEE
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    • v.13 no.4
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    • pp.110-115
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    • 2009
  • The motion compensation is the most time-consuming and complex unit in the H.264 decoder. The performance of the motion compensation is determined by the calculation of pixel interpolation. The quarter-pixel interpolation is achieved using 6-tap horizontal or vertical FIR filters for luminance data and bilinear FIR filters for chroma data. We propose the architecture for interpolation of luminance and chroma data in H.264 decoders. It is composed of dual-channel pipelined processing elements and can interpolate integer-, half- and quarter-pixel data. The number of the processing cycles is different depending on the position. The processing elements are composed of adders and shifters to reduce the complexity while the accuracy of the pixel data are maintained. We design interpolators for luminance and chroma data using Verilog-HDL and verify the function and performance by implementing using an FPGA.

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